On 1/15/2025 8:47 PM, Mitul Golani wrote:
Limit downscaling to less than 1.5 (source/destination) in
the horizontal direction and 1.0 in the vertical direction,
When configured for Pipe YUV 420 encoding for port output.
Bspec: 50441
Also Bspec:7490, 69901
Make Bspec: # as part of trailer.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/skl_scaler.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 72344044d9d3..c9d7966b37ff 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -456,6 +456,16 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state,
calculate_max_scale(crtc, 0, *scaler_id,
&max_hscale, &max_vscale);
+ /*
+ * When configured for Pipe YUV 420 encoding for port output,
+ * limit downscaling to less than 1.5 (source/destination) in
+ * the horizontal direction and 1.0 in the vertical direction.
+ */
+ if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+ max_hscale = 0x18000 - 1;
+ max_vscale = 0x10000;
+ }
+
hscale = drm_rect_calc_hscale(&src, &crtc_state->pch_pfit.dst,
0, max_hscale);
vscale = drm_rect_calc_vscale(&src, &crtc_state->pch_pfit.dst,
