RE: [PATCH v7 14/14] drm/i915/histogram: Enable pipe dithering

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> -----Original Message-----
> From: Murthy, Arun R <arun.r.murthy@xxxxxxxxx>
> Sent: Friday, January 10, 2025 1:16 AM
> To: dri-devel@xxxxxxxxxxxxxxxxxxxxx; intel-gfx@xxxxxxxxxxxxxxxxxxxxx; intel-
> xe@xxxxxxxxxxxxxxxxxxxxx
> Cc: dmitry.baryshkov@xxxxxxxxxx; Kandpal, Suraj <suraj.kandpal@xxxxxxxxx>;
> Shankar, Uma <uma.shankar@xxxxxxxxx>; "Imported from f20241218-dpst-
> v7-0-81bfe7d08c2d"@intel.com; 20240705091333.328322-1-
> mohammed.thasleem@xxxxxxxxx; Murthy, Arun R
> <arun.r.murthy@xxxxxxxxx>
> Subject: [PATCH v7 14/14] drm/i915/histogram: Enable pipe dithering
> 
> Enable pipe dithering while enabling histogram to overcome some atrifacts
> seen on the screen.
> 
> Signed-off-by: Arun R Murthy <arun.r.murthy@xxxxxxxxx>

LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx>

> ---
>  drivers/gpu/drm/i915/display/intel_histogram.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c
> b/drivers/gpu/drm/i915/display/intel_histogram.c
> index
> d015350b57ed5c8e9aaab71311159bf51e15e9c7..7d0c5d07042c5eb0e33c
> 95e7cadac5c0d1fda379 100644
> --- a/drivers/gpu/drm/i915/display/intel_histogram.c
> +++ b/drivers/gpu/drm/i915/display/intel_histogram.c
> @@ -22,6 +22,13 @@
>  #define HISTOGRAM_BIN_READ_RETRY_COUNT 5  #define
> IET_SAMPLE_FORMAT_1_INT_9_FRACT 0x1000009
> 
> +static void intel_histogram_enable_dithering(struct intel_display *display,
> +					     enum pipe pipe)
> +{
> +	intel_de_rmw(display, PIPE_MISC(pipe), PIPE_MISC_DITHER_ENABLE,
> +		     PIPE_MISC_DITHER_ENABLE);
> +}
> +
>  static void set_bin_index_0(struct intel_display *display, enum pipe pipe)  {
>  	if (DISPLAY_VER(display) >= 20)
> @@ -200,6 +207,10 @@ static int intel_histogram_enable(struct intel_crtc
> *intel_crtc, u8 mode)
> 
>  	if (histogram->enable)
>  		return 0;
> +
> +	/* Pipe Dithering should be enabled with histogram */
> +	intel_histogram_enable_dithering(display, pipe);
> +
>  	 /* enable histogram, clear DPST_BIN reg and select TC function */
>  	if (DISPLAY_VER(display) >= 20)
>  		intel_de_rmw(display, DPST_CTL(pipe),
> 
> --
> 2.25.1





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