> -----Original Message-----
> From: Vodapalli, Ravi Kumar <ravi.kumar.vodapalli@xxxxxxxxx>
> Sent: Thursday, January 9, 2025 1:32 AM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Vivekanandan, Balasubramani
> <balasubramani.vivekanandan@xxxxxxxxx>; Roper, Matthew D
> <matthew.d.roper@xxxxxxxxx>; De Marchi, Lucas
> <lucas.demarchi@xxxxxxxxx>; Sousa, Gustavo <gustavo.sousa@xxxxxxxxx>;
> Taylor, Clinton A <clinton.a.taylor@xxxxxxxxx>; Atwood, Matthew S
> <matthew.s.atwood@xxxxxxxxx>; Bhadane, Dnyaneshwar
> <dnyaneshwar.bhadane@xxxxxxxxx>; Kalvala, Haridhar
> <haridhar.kalvala@xxxxxxxxx>; Chauhan, Shekhar
> <shekhar.chauhan@xxxxxxxxx>
> Subject: [PATCH v3] drm/i915/display: Don't update
> DBUF_TRACKER_STATE_SERVICE
>
> The bspec only asks the driver to reprogram the DBUF_CTL's
> DBUF_TRACKER_STATE_SERVICE field to 0x8 on DG2 and platforms with
> display version 12. All other platforms should avoid reprogramming this
> register at driver init.
>
> Although we've been accidentally reprogramming DBUF_CTL on platforms
> where the spec does not ask us to, that mistake has been harmless so far
> because the value being programmed by the driver happened to match the
> hardware's default settings.
>
> So, update DBUF_TRACKER_STATE_SERVICE field to 0x8 only for 1. display
> version 12 2. DG2.
> Other platforms unless stated should use their default value.
>
Please write revision history. It will be easy for the reviewer what has been
address/changed from the previous version reviews.
Regards,
Dnyaneshwar
> Bspec: 49213
> Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 34465d56def0..9c20459053fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1126,9 +1126,6 @@ static void gen12_dbuf_slices_config(struct
> intel_display *display) {
> enum dbuf_slice slice;
>
> - if (display->platform.alderlake_p)
> - return;
> -
> for_each_dbuf_slice(display, slice)
> intel_de_rmw(display, DBUF_CTL_S(slice),
> DBUF_TRACKER_STATE_SERVICE_MASK, @@ -
> 1681,7 +1678,7 @@ static void icl_display_core_init(struct intel_display
> *display,
> /* 4. Enable CDCLK. */
> intel_cdclk_init_hw(display);
>
> - if (DISPLAY_VER(display) >= 12)
> + if (DISPLAY_VER(display) == 12 || display->platform.dg2)
> gen12_dbuf_slices_config(display);
>
> /* 5. Enable DBUF. */
> --
> 2.25.1
