> -----Original Message-----
> From: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Sent: Wednesday, January 8, 2025 10:31 PM
> To: Bhadane, Dnyaneshwar <dnyaneshwar.bhadane@xxxxxxxxx>; intel-
> gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Bhadane, Dnyaneshwar <dnyaneshwar.bhadane@xxxxxxxxx>
> Subject: Re: [PATCH] drm/i915/bios: Define eDP pipe joiner feature for VBT
>
> On Wed, 08 Jan 2025, Dnyaneshwar Bhadane
> <dnyaneshwar.bhadane@xxxxxxxxx> wrote:
> > There is new field "edp pipe joiner feature" size of 2 bytes in the
> > eDP VBT block. Each bit represent panel number to be enable/disable
> > for this feature.
> >
> > Default value:
> > For ARL platform, 0x0000 to keep the feature disabled by default.
> > Xe3lpd onwards, 0xFFFF to keep the feature enable by default by VBT.
> >
> > Bspec: 20142
> > Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@xxxxxxxxx>
>
> The patch does it ways, so...
>
> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
>
> ...but are you going to use the info for something?
It was just to note for the future use. Thanks.
Regards,
Dnyaneshwar
>
> BR,
> Jani.
>
>
> > ---
> > drivers/gpu/drm/i915/display/intel_vbt_defs.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > index e9b809568cd4..2fdad5170896 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > @@ -1090,6 +1090,7 @@ struct bdb_edp {
> > u16 edp_dsc_disable; /* 251+ */
> > u16 t6_delay_support; /* 260+ */
> > u16 link_idle_time[16]; /* 260+ */
> > + u16 edp_pipe_joiner_feature; /* 261+ */
> > } __packed;
> >
> > /*
>
> --
> Jani Nikula, Intel
