> > GSC NVM controller HW errors on quad access overlapping 1K border.
> > Align 64bit read and write to avoid readq/writeq over 1K border.
> >
> > Acked-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
> > Signed-off-by: Alexander Usyskin <alexander.usyskin@xxxxxxxxx>
> > ---
> > drivers/mtd/devices/mtd-intel-dg.c | 35
> ++++++++++++++++++++++++++++++
> > 1 file changed, 35 insertions(+)
> >
> > diff --git a/drivers/mtd/devices/mtd-intel-dg.c b/drivers/mtd/devices/mtd-
> intel-dg.c
> > index 76ef7198fff8..230bf444b7fe 100644
> > --- a/drivers/mtd/devices/mtd-intel-dg.c
> > +++ b/drivers/mtd/devices/mtd-intel-dg.c
> > @@ -238,6 +238,24 @@ static ssize_t idg_write(struct intel_dg_nvm *nvm,
> u8 region,
> > len_s -= to_shift;
> > }
> >
> > + if (!IS_ALIGNED(to, sizeof(u64)) &&
> > + ((to ^ (to + len_s)) & GENMASK(31, 10))) {
>
> I'm sure that should be (to + len_s - 1).
> Using GENMASK(31, 10) completely fails to indicate what is being tested.
Will look at it, but this form works fine in practice.
>
> > + /*
> > + * Workaround reads/writes across 1k-aligned addresses
> > + * (start u32 before 1k, end u32 after)
> > + * as this fails on hardware.
> > + */
> > + u32 data;
> > +
> > + memcpy(&data, &buf[0], sizeof(u32));
>
> get_unaligned_u32()
>
Can't find such function in kernel at all
> > + idg_nvm_write32(nvm, to, data);
> > + if (idg_nvm_error(nvm))
> > + return -EIO;
> > + buf += sizeof(u32);
> > + to += sizeof(u32);
> > + len_s -= sizeof(u32);
> > + }
>
> It isn't at all obvious why copying 4 bytes helps.
> Indeed, if 'to' is 1023 and 'len_s' is 2 it goes terribly wrong.
Data is aligned to sizeof(u32) before this check, so 1023 and 2 can't be here.
We can come here only if we 4bytes before 1k boundary and
we are reading all that left before boundary.
After that the data will be sizeof(u64) aligned.
>
> David
>
> > +
> > len8 = ALIGN_DOWN(len_s, sizeof(u64));
> > for (i = 0; i < len8; i += sizeof(u64)) {
> > u64 data;
- -
Thanks,
Sasha
