Quoting Jani Nikula (2024-12-31 13:27:38-03:00)
>Only intel_pmdemand.c should look inside the struct
>intel_pmdemand_state. Indeed, this is already the case. Finish the job
>and make struct intel_pmdemand_state opaque, preventing any direct pokes
>at the guts of it in the future.
>
>Cc: Gustavo Sousa <gustavo.sousa@xxxxxxxxx>
>Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Reviewed-by: Gustavo Sousa <gustavo.sousa@xxxxxxxxx>
>---
> drivers/gpu/drm/i915/display/intel_pmdemand.c | 28 +++++++++++++++
> drivers/gpu/drm/i915/display/intel_pmdemand.h | 34 +++----------------
> 2 files changed, 32 insertions(+), 30 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c
>index 69b40b3735b3..500faf639290 100644
>--- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
>+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
>@@ -15,6 +15,34 @@
> #include "intel_pmdemand.h"
> #include "skl_watermark.h"
>
>+struct pmdemand_params {
>+ u16 qclk_gv_bw;
>+ u8 voltage_index;
>+ u8 qclk_gv_index;
>+ u8 active_pipes;
>+ u8 active_dbufs; /* pre-Xe3 only */
>+ /* Total number of non type C active phys from active_phys_mask */
>+ u8 active_phys;
>+ u8 plls;
>+ u16 cdclk_freq_mhz;
>+ /* max from ddi_clocks[] */
>+ u16 ddiclk_max;
>+ u8 scalers; /* pre-Xe3 only */
>+};
>+
>+struct intel_pmdemand_state {
>+ struct intel_global_state base;
>+
>+ /* Maintain a persistent list of port clocks across all crtcs */
>+ int ddi_clocks[I915_MAX_PIPES];
>+
>+ /* Maintain a persistent list of non type C phys mask */
>+ u16 active_combo_phys_mask;
>+
>+ /* Parameters to be configured in the pmdemand registers */
>+ struct pmdemand_params params;
>+};
>+
> struct intel_pmdemand_state *to_intel_pmdemand_state(struct intel_global_state *obj_state)
> {
> return container_of(obj_state, struct intel_pmdemand_state, base);
>diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.h b/drivers/gpu/drm/i915/display/intel_pmdemand.h
>index 89296364ec3b..34f68912fe04 100644
>--- a/drivers/gpu/drm/i915/display/intel_pmdemand.h
>+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.h
>@@ -6,42 +6,16 @@
> #ifndef __INTEL_PMDEMAND_H__
> #define __INTEL_PMDEMAND_H__
>
>-#include "intel_display_limits.h"
>-#include "intel_global_state.h"
>+#include <linux/types.h>
>
>+enum pipe;
> struct drm_i915_private;
> struct intel_atomic_state;
> struct intel_crtc_state;
> struct intel_encoder;
>+struct intel_global_state;
> struct intel_plane_state;
>-
>-struct pmdemand_params {
>- u16 qclk_gv_bw;
>- u8 voltage_index;
>- u8 qclk_gv_index;
>- u8 active_pipes;
>- u8 active_dbufs; /* pre-Xe3 only */
>- /* Total number of non type C active phys from active_phys_mask */
>- u8 active_phys;
>- u8 plls;
>- u16 cdclk_freq_mhz;
>- /* max from ddi_clocks[] */
>- u16 ddiclk_max;
>- u8 scalers; /* pre-Xe3 only */
>-};
>-
>-struct intel_pmdemand_state {
>- struct intel_global_state base;
>-
>- /* Maintain a persistent list of port clocks across all crtcs */
>- int ddi_clocks[I915_MAX_PIPES];
>-
>- /* Maintain a persistent list of non type C phys mask */
>- u16 active_combo_phys_mask;
>-
>- /* Parameters to be configured in the pmdemand registers */
>- struct pmdemand_params params;
>-};
>+struct intel_pmdemand_state;
>
> struct intel_pmdemand_state *to_intel_pmdemand_state(struct intel_global_state *obj_state);
>
>--
>2.39.5
>
