> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@xxxxxxxxx>
> Sent: Wednesday, December 4, 2024 2:57 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: intel-xe@xxxxxxxxxxxxxxxxxxxxx; Kandpal, Suraj <suraj.kandpal@xxxxxxxxx>;
> jani.nikula@xxxxxxxxxxxxxxx; Deak, Imre <imre.deak@xxxxxxxxx>
> Subject: [PATCH 08/14] drm/i915/dp_mst: Use helpers to get dsc min/max
> input bpc
>
> Use helpers for source min/max input bpc with DSC.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 --
> drivers/gpu/drm/i915/display/intel_dp.h | 3 +++
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 +++++--------
> 3 files changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index edfe084dca39..bff7441d2ddd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1780,7 +1780,6 @@ intel_dp_compute_link_config_wide(struct intel_dp
> *intel_dp,
> return -EINVAL;
> }
>
> -static
> int intel_dp_dsc_max_src_input_bpc(struct intel_display *display) {
> /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ @@ -2183,7
> +2182,6 @@ static int dsc_compute_compressed_bpp(struct intel_dp
> *intel_dp,
> dsc_max_bpp, dsc_min_bpp,
> pipe_bpp, timeslots); }
>
> -static
> int intel_dp_dsc_min_src_input_bpc(void)
> {
> /* Min DSC Input BPC for ICL+ is 8 */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 4ae54e9718ce..4895b52d41e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -20,6 +20,7 @@ struct intel_atomic_state; struct intel_connector; struct
> intel_crtc_state; struct intel_digital_port;
> +struct intel_display;
> struct intel_dp;
> struct intel_encoder;
>
> @@ -207,5 +208,7 @@ bool intel_dp_link_params_valid(struct intel_dp
> *intel_dp, int link_rate,
> u8 lane_count);
> bool intel_dp_has_connector(struct intel_dp *intel_dp,
> const struct drm_connector_state *conn_state);
> +int intel_dp_dsc_max_src_input_bpc(struct intel_display *display); int
> +intel_dp_dsc_min_src_input_bpc(void);
>
> #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 9b64c8a0e55e..795594191717 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -365,17 +365,14 @@ static int
> mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp,
> int i, num_bpc;
> u8 dsc_bpc[3] = {};
> int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
> - u8 dsc_max_bpc;
> + int dsc_max_bpc, dsc_min_bpc;
> int min_compressed_bpp, max_compressed_bpp;
>
> - /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */
> - if (DISPLAY_VER(display) >= 12)
> - dsc_max_bpc = min_t(u8, 12, conn_state-
> >max_requested_bpc);
> - else
> - dsc_max_bpc = min_t(u8, 10, conn_state-
> >max_requested_bpc);
> + dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display);
> + dsc_min_bpc = intel_dp_dsc_min_src_input_bpc();
>
> - max_bpp = min_t(u8, dsc_max_bpc * 3, limits->pipe.max_bpp);
> - min_bpp = limits->pipe.min_bpp;
> + max_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp);
> + min_bpp = max(dsc_min_bpc * 3, limits->pipe.min_bpp);
>
> num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector-
> >dp.dsc_dpcd,
> dsc_bpc);
> --
> 2.45.2
