On Wed, 13 Nov 2013 21:59:04 +0000 Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote: > On Wed, Nov 13, 2013 at 10:20:44AM -0800, Jesse Barnes wrote: > > And move it up in the file for earlier usage. > > > > Signed-off-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_display.c | 26 ++++++++++++++++---------- > > 1 file changed, 16 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > index 2df2366..d4cc00c 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -5452,6 +5452,17 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc, > > pipe_config->port_clock = clock.dot / 5; > > } > > > > +static u32 > > +intel_framebuffer_pitch_for_width(int width, int bpp, bool tiled) > > +{ > > + u32 pitch = DIV_ROUND_UP(width * bpp, 8); > > + > > + if (tiled) > > + return ALIGN(pitch, 512); > > Should this not go the whole hog and do pot alignment on gen2/3? Probably a good idea. And this smells like common code, surely we must be doing this somewhere else too? Anyway could definitely be extended. -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx