Initial patchset to support dirty rect capability for FBC in Xe3. This is the initial design suggestion for the feedback. This is for non PSR cases. Seective fetch is not allowed with the dirty rectangle feature. More FC use case scenarios might need to be handled - such as frontbuffer flush, invalidate and more cases we would need to do a full region update etc. Vinod Govindapillai (4): drm/i915/display: update intel_fbc_atomic_check for dirty_fbc support drm/i915/display: add register definitions for fbc dirty rect support drm/i915/xe3: add dirty rect support for FBC drm/i915/xe3: disable FBC if PSR2 selective fetch is enabled drivers/gpu/drm/i915/display/intel_fbc.c | 145 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_fbc.h | 3 + drivers/gpu/drm/i915/display/intel_fbc_regs.h | 9 ++ .../drm/i915/display/skl_universal_plane.c | 2 + 4 files changed, 155 insertions(+), 4 deletions(-) -- 2.34.1
