Series: | drm/i915/cx0: Set power state to ready only on owned PHY lanes (rev4) |
URL: | https://patchwork.freedesktop.org/series/138985/ |
State: | success |
Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138985v4/index.html |
CI Bug Log - changes from CI_DRM_15683 -> Patchwork_138985v4
Summary
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138985v4/index.html
Participating hosts (46 -> 45)
Missing (1): fi-snb-2520m
Known issues
Here are the changes found in Patchwork_138985v4 that come from known issues:
IGT changes
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Build changes
- Linux: CI_DRM_15683 -> Patchwork_138985v4
CI-20190529: 20190529
CI_DRM_15683: d0ee255ce0a12bc0828fd46acf1ceffa69172097 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8103: 43994179978d4a120226f253cb95209d59639ef9 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_138985v4: d0ee255ce0a12bc0828fd46acf1ceffa69172097 @ git://anongit.freedesktop.org/gfx-ci/linux