[PATCH 23/23] drm/i915/display: Use VRR timings for XE2LPD+ in modeset sequence

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Subject: [PATCH 23/23] drm/i915/display: Use VRR timings for XE2LPD+ in modeset sequence
From: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx>
Date: Mon, 11 Nov 2024 14:42:21 +0530
Cc: intel-xe@xxxxxxxxxxxxxxxxxxxxx, jani.nikula@xxxxxxxxxxxxxxx, ville.syrjala@xxxxxxxxxxxxxxx, mitulkumar.ajitkumar.golani@xxxxxxxxx
In-reply-to: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com>
References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com>

While enabling pipe currently we use the non vrr timings first and then
enable the VRR timings later.

References:
- [PATCH 00/23] Use VRR timing generator for fixed refresh rate modes
  - From: Ankit Nautiyal

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