On Wed, 06 Nov 2024, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> We currently lack a proper struct definition for the VBT power
> squecing delays, and instead we use the same struct definition
*sequencing
> (in intel_bios.h) for both the VBT layout and our driver side
> state. Decouple those two things by moving the current struct
> into intel_vbt_defs.h and adding a new one for the driver's use.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 15 +++++++++++---
> drivers/gpu/drm/i915/display/intel_bios.h | 8 --------
> .../drm/i915/display/intel_display_types.h | 15 +++++++++++---
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 1 -
> drivers/gpu/drm/i915/display/intel_pps.c | 20 +++++++++----------
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 8 ++++++++
> 6 files changed, 42 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index a4cdd82c4a75..31398de08e7f 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1402,12 +1402,21 @@ parse_power_conservation_features(struct intel_display *display,
> panel_type);
> }
>
> +static void vbt_edp_to_pps_delays(struct intel_pps_delays *pps,
> + const struct edp_power_seq *edp_pps)
> +{
> + pps->t1_t3 = edp_pps->t1_t3;
> + pps->t8 = edp_pps->t8;
> + pps->t9 = edp_pps->t9;
> + pps->t10 = edp_pps->t10;
> + pps->t11_t12 = edp_pps->t11_t12;
> +}
> +
> static void
> parse_edp(struct intel_display *display,
> struct intel_panel *panel)
> {
> const struct bdb_edp *edp;
> - const struct edp_power_seq *edp_pps;
> const struct edp_fast_link_params *edp_link_params;
> int panel_type = panel->vbt.panel_type;
>
> @@ -1428,10 +1437,10 @@ parse_edp(struct intel_display *display,
> }
>
> /* Get the eDP sequencing and link info */
> - edp_pps = &edp->power_seqs[panel_type];
> edp_link_params = &edp->fast_link_params[panel_type];
>
> - panel->vbt.edp.pps = *edp_pps;
> + vbt_edp_to_pps_delays(&panel->vbt.edp.pps,
> + &edp->power_seqs[panel_type]);
>
> if (display->vbt.version >= 224) {
> panel->vbt.edp.rate =
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
> index 8b703f6cfe17..f9841f0498c6 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.h
> +++ b/drivers/gpu/drm/i915/display/intel_bios.h
> @@ -50,14 +50,6 @@ enum intel_backlight_type {
> INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE,
> };
>
> -struct edp_power_seq {
> - u16 t1_t3;
> - u16 t8;
> - u16 t9;
> - u16 t10;
> - u16 t11_t12;
> -} __packed;
> -
> /*
> * MIPI Sequence Block definitions
> *
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index d3a1aa7c919f..62cf5d007872 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -301,6 +301,15 @@ struct intel_panel_bl_funcs {
> u32 (*hz_to_pwm)(struct intel_connector *connector, u32 hz);
> };
>
> +/* in 100us units */
> +struct intel_pps_delays {
> + u16 t1_t3;
> + u16 t8;
> + u16 t9;
> + u16 t10;
> + u16 t11_t12;
> +};
> +
> enum drrs_type {
> DRRS_TYPE_NONE,
> DRRS_TYPE_STATIC,
> @@ -328,7 +337,7 @@ struct intel_vbt_panel_data {
> int preemphasis;
> int vswing;
> int bpp;
> - struct edp_power_seq pps;
> + struct intel_pps_delays pps;
> u8 drrs_msa_timing_delay;
> bool low_vswing;
> bool hobl;
> @@ -1568,8 +1577,8 @@ struct intel_pps {
> * requiring a reinitialization. Only relevant on BXT+.
> */
> bool bxt_pps_reset;
> - struct edp_power_seq pps_delays;
> - struct edp_power_seq bios_pps_delays;
> + struct intel_pps_delays pps_delays;
> + struct intel_pps_delays bios_pps_delays;
> };
>
> struct intel_psr {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index 04a7acd7f73c..7daa8a95dc70 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -6,7 +6,6 @@
> #include "i915_drv.h"
> #include "i915_reg.h"
> #include "i915_trace.h"
> -#include "intel_bios.h"
> #include "intel_de.h"
> #include "intel_display_types.h"
> #include "intel_dp.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 83d65105f32b..c57b9aca5a31 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -1387,7 +1387,7 @@ static void pps_init_timestamps(struct intel_dp *intel_dp)
> }
>
> static void
> -intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct edp_power_seq *seq)
> +intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct intel_pps_delays *seq)
> {
> struct intel_display *display = to_intel_display(intel_dp);
> u32 pp_on, pp_off, pp_ctl, power_cycle_delay;
> @@ -1426,7 +1426,7 @@ intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct edp_power_seq *seq)
>
> static void
> intel_pps_dump_state(struct intel_dp *intel_dp, const char *state_name,
> - const struct edp_power_seq *seq)
> + const struct intel_pps_delays *seq)
> {
> struct intel_display *display = to_intel_display(intel_dp);
>
> @@ -1440,8 +1440,8 @@ static void
> intel_pps_verify_state(struct intel_dp *intel_dp)
> {
> struct intel_display *display = to_intel_display(intel_dp);
> - struct edp_power_seq hw;
> - struct edp_power_seq *sw = &intel_dp->pps.pps_delays;
> + struct intel_pps_delays hw;
> + struct intel_pps_delays *sw = &intel_dp->pps.pps_delays;
>
> intel_pps_readout_hw_state(intel_dp, &hw);
>
> @@ -1453,14 +1453,14 @@ intel_pps_verify_state(struct intel_dp *intel_dp)
> }
> }
>
> -static bool pps_delays_valid(struct edp_power_seq *delays)
> +static bool pps_delays_valid(struct intel_pps_delays *delays)
> {
> return delays->t1_t3 || delays->t8 || delays->t9 ||
> delays->t10 || delays->t11_t12;
> }
>
> static void pps_init_delays_bios(struct intel_dp *intel_dp,
> - struct edp_power_seq *bios)
> + struct intel_pps_delays *bios)
> {
> struct intel_display *display = to_intel_display(intel_dp);
>
> @@ -1475,7 +1475,7 @@ static void pps_init_delays_bios(struct intel_dp *intel_dp,
> }
>
> static void pps_init_delays_vbt(struct intel_dp *intel_dp,
> - struct edp_power_seq *vbt)
> + struct intel_pps_delays *vbt)
> {
> struct intel_display *display = to_intel_display(intel_dp);
> struct intel_connector *connector = intel_dp->attached_connector;
> @@ -1501,7 +1501,7 @@ static void pps_init_delays_vbt(struct intel_dp *intel_dp,
> }
>
> static void pps_init_delays_spec(struct intel_dp *intel_dp,
> - struct edp_power_seq *spec)
> + struct intel_pps_delays *spec)
> {
> struct intel_display *display = to_intel_display(intel_dp);
>
> @@ -1521,7 +1521,7 @@ static void pps_init_delays_spec(struct intel_dp *intel_dp,
> static void pps_init_delays(struct intel_dp *intel_dp)
> {
> struct intel_display *display = to_intel_display(intel_dp);
> - struct edp_power_seq cur, vbt, spec,
> + struct intel_pps_delays cur, vbt, spec,
> *final = &intel_dp->pps.pps_delays;
>
> lockdep_assert_held(&display->pps.mutex);
> @@ -1589,7 +1589,7 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd
> int div = DISPLAY_RUNTIME_INFO(display)->rawclk_freq / 1000;
> struct pps_registers regs;
> enum port port = dp_to_dig_port(intel_dp)->base.port;
> - const struct edp_power_seq *seq = &intel_dp->pps.pps_delays;
> + const struct intel_pps_delays *seq = &intel_dp->pps.pps_delays;
>
> lockdep_assert_held(&display->pps.mutex);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index 42022756bbd5..e9b809568cd4 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -1014,6 +1014,14 @@ struct bdb_tv_options {
> * Block 27 - eDP VBT Block
> */
>
> +struct edp_power_seq {
> + u16 t1_t3;
> + u16 t8;
> + u16 t9;
> + u16 t10;
> + u16 t11_t12;
> +} __packed;
> +
> #define EDP_18BPP 0
> #define EDP_24BPP 1
> #define EDP_30BPP 2
--
Jani Nikula, Intel
