> -----Original Message-----
> From: Kandpal, Suraj <suraj.kandpal@xxxxxxxxx>
> Sent: Tuesday, November 5, 2024 12:21 AM
> To: intel-xe@xxxxxxxxxxxxxxxxxxxxx; intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Roper, Matthew D <matthew.d.roper@xxxxxxxxx>; Kandpal, Suraj
> <suraj.kandpal@xxxxxxxxx>
> Subject: [PATCH] drm/i915/xe3lpd: Update HDCP rekying bit
>
> The TRANS_DDI_FUNC_CTL bit used to enable/disable HDCP rekeying has
> moved from bit 12 (Xe2) to bit 15 (Xe3); update the RMW toggle accordingly.
> Also drop the misleading workaround comment tag on this function since
> disabling of HDCP rekeying is something that happens on all platforms, not
> just those impacted by that workaround.
> While we're here, also re-order the if/else ladder to use standard "newest
> platform first" order.
>
> v2: add additional definition instead of function, commit message typo fix
> and update.
> v3: restore lost conditional from v2.
> v4: subject line and subject message updated, fix the if ladder order, fix the
> bit definition order.
> v5: Add the bspec link and remove the Wa comment tag
> v6: Rebase over new changes
> v7: Fix commit subject and message, reladder the if/else blocks
>
> Bspec: 69964
> Signed-off-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx>
> Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
Thanks for the reviews pushed to din after correcting the subject line typo
Regards,
Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_hdcp.c | 23 ++++++++++++-----------
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 13 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index f6d42ec6949e..4e937fbba4d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -31,7 +31,6 @@
> #define KEY_LOAD_TRIES 5
> #define HDCP2_LC_RETRY_CNT 3
>
> -/* WA: 16022217614 */
> static void
> intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
> struct intel_hdcp *hdcp)
> @@ -42,16 +41,18 @@ intel_hdcp_disable_hdcp_line_rekeying(struct
> intel_encoder *encoder,
> if (encoder->type != INTEL_OUTPUT_HDMI)
> return;
>
> - if (DISPLAY_VER(display) >= 14) {
> - if (IS_DISPLAY_VERx100_STEP(display, 1400, STEP_D0,
> STEP_FOREVER))
> - intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> >cpu_transcoder),
> - 0, HDCP_LINE_REKEY_DISABLE);
> - else if (IS_DISPLAY_VERx100_STEP(display, 1401, STEP_B0,
> STEP_FOREVER) ||
> - IS_DISPLAY_VERx100_STEP(display, 2000, STEP_B0,
> STEP_FOREVER))
> - intel_de_rmw(display,
> - TRANS_DDI_FUNC_CTL(display, hdcp-
> >cpu_transcoder),
> - 0,
> TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> - }
> + if (DISPLAY_VER(display) >= 30)
> + intel_de_rmw(display,
> + TRANS_DDI_FUNC_CTL(display, hdcp-
> >cpu_transcoder),
> + 0, XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> + else if (IS_DISPLAY_VERx100_STEP(display, 1401, STEP_B0,
> STEP_FOREVER) ||
> + IS_DISPLAY_VERx100_STEP(display, 2000, STEP_B0,
> STEP_FOREVER))
> + intel_de_rmw(display,
> + TRANS_DDI_FUNC_CTL(display, hdcp-
> >cpu_transcoder),
> + 0, TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> + else if (IS_DISPLAY_VERx100_STEP(display, 1400, STEP_D0,
> STEP_FOREVER))
> + intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> >cpu_transcoder),
> + 0, HDCP_LINE_REKEY_DISABLE);
> }
>
> static int intel_conn_to_vcpi(struct intel_atomic_state *state, diff --git
> a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index
> 22be4a731d27..c160e087972a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3819,6 +3819,7 @@ enum skl_power_gate {
> #define TRANS_DDI_PVSYNC (1 << 17)
> #define TRANS_DDI_PHSYNC (1 << 16)
> #define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15)
> +#define XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(15)
> #define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
> #define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
> #define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
> --
> 2.34.1
