Increase the max source width and height to be able to support 6k resolution on a single pipe. The changes for cdclk that accompany this change are already merged in the code. Bspec: 68858 Signed-off-by: Arun R Murthy <arun.r.murthy@xxxxxxxxx> Signed-off-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx> Suraj Kandpal (5): drm/i915/display: Fix the plane max height and width limits drm/i915/xe3lpd: Increase resolution for plane to support 6k drm/i915/psr: Increase psr size limits for Xe2 drm/i915/xe3lpd: Increase max_h max_v for PSR drm/i914/xe3lpd: Increase bigjoiner limitations drivers/gpu/drm/i915/display/intel_display.c | 27 ++++++++++++++++--- drivers/gpu/drm/i915/display/intel_dp.c | 5 +++- drivers/gpu/drm/i915/display/intel_psr.c | 10 ++++++- .../drm/i915/display/skl_universal_plane.c | 16 ++++++++++- 4 files changed, 52 insertions(+), 6 deletions(-) -- 2.34.1
