On Fri, Oct 18, 2024 at 01:49:30PM -0700, Matt Atwood wrote:
> From: Mitul Golani <mitulkumar.ajitkumar.golani@xxxxxxxxx>
>
> In progress to make VRR timing generator as the default timing generator,
> rest other timings will be derived based on vrr.vmin and vrr.vmax. Call
I'm having trouble following what this first sentence is trying to say;
I think it might be missing some words? Can you reword it to be more
clear?
We may want to elaborate more on what "VRR timing generator as the
default timing generator" means and how/why that's happening.
Matt
> intel_vrr_get_config before intel_get_transcoder_timings to accomodate
> values getting pre-filled.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@xxxxxxxxx>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx>
> Signed-off-by: Matt Atwood <matthew.s.atwood@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ef1436146325..01466611eebe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4134,13 +4134,13 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> intel_joiner_get_config(pipe_config);
> intel_dsc_get_config(pipe_config);
>
> + if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config->cpu_transcoder))
> + intel_vrr_get_config(pipe_config);
> +
> if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
> DISPLAY_VER(dev_priv) >= 11)
> intel_get_transcoder_timings(crtc, pipe_config);
>
> - if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config->cpu_transcoder))
> - intel_vrr_get_config(pipe_config);
> -
> intel_get_pipe_src_size(crtc, pipe_config);
>
> if (IS_HASWELL(dev_priv)) {
> --
> 2.45.0
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
