== Series Details == Series: drm/i915/xe3lpd: ptl display patches URL : https://patchwork.freedesktop.org/series/140196/ State : warning == Summary == Error: dim checkpatch failed a321afa49956 drm/i915/display/ptl: Fill VRR crtc_state timings before other transcoder timings -:9: WARNING:TYPO_SPELLING: 'accomodate' may be misspelled - perhaps 'accommodate'? #9: intel_vrr_get_config before intel_get_transcoder_timings to accomodate ^^^^^^^^^^ total: 0 errors, 1 warnings, 0 checks, 16 lines checked d3fd7e371877 drm/i915/ptl: Define IS_PANTHERLAKE macro -:20: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'i915' may be better as '(i915)' to avoid precedence issues #20: FILE: drivers/gpu/drm/i915/i915_drv.h:541: +#define IS_PANTHERLAKE(i915) (0 && i915) total: 0 errors, 0 warnings, 1 checks, 7 lines checked 6d14fe71ffed drm/i915/cx0: Extend C10 check to PTL 8a555aa21f54 drm/i915/ptl: Move async flip bit to PLANE_SURF register -:28: ERROR:SPACING: space required before the open brace '{' #28: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:1575: + if (async_flip){ -:30: ERROR:CODE_INDENT: code indent should use tabs where possible #30: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:1577: +^I plane_surf |= PLANE_SURF_ASYNC_UPDATE;$ total: 2 errors, 0 warnings, 0 checks, 33 lines checked a563b1c6d331 drm/i915/xe3: Underrun recovery does not exist post Xe2 69b06eae4f5a drm/i915/display/xe3: disable x-tiled framebuffers 7b2c449c876d drm/i915/xe3lpd: Skip disabling VRR during modeset disable de1b3b01e104 drm/i915/xe3lpd: Increase resolution for plane to support 6k -:39: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #39: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:435: +static int xe3_plane_max_width(const struct drm_framebuffer *fb, + int color_plane, -:57: ERROR:SPACING: space required after that close brace '}' #57: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:2603: + }else if (DISPLAY_VER(dev_priv) >= 11) { total: 1 errors, 0 warnings, 1 checks, 36 lines checked a2d680a52386 drm/i915/xe3lpd: Increase max_h max_v for PSR b8d95e27cc30 drm/i915/xe3lpd: Increase bigjoiner limitations 1fa2d15ed3be drm/i915/xe3lpd: Prune modes for YUV420 -:6: WARNING:TYPO_SPELLING: 'upto' may be misspelled - perhaps 'up to'? #6: We only support resolution upto 4k for single pipe when using ^^^^ total: 0 errors, 1 warnings, 0 checks, 42 lines checked dcd252e08107 drm/i915/xe3lpd: Power request asserting/deasserting -:95: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #95: FILE: drivers/gpu/drm/i915/i915_reg.h:4543: +#define TCSS_DISP_MAILBOX_IN_CMD_DATA(x) TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY | \ + REG_FIELD_PREP(TCSS_DISP_MAILBOX_IN_CMD_CMD_MASK, (x)) -:96: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #96: FILE: drivers/gpu/drm/i915/i915_reg.h:4544: + REG_FIELD_PREP(TCSS_DISP_MAILBOX_IN_CMD_CMD_MASK, (x)) total: 1 errors, 1 warnings, 0 checks, 65 lines checked
