== Series Details == Series: Add xe3lpd edp enabling (rev3) URL : https://patchwork.freedesktop.org/series/139731/ State : warning == Summary == Error: dim checkpatch failed 66e932283365 drm/i915/xe3lpd: Update pmdemand programming 7f58d2c0ab26 drm/i915/xe3lpd: Add cdclk changes -:15: WARNING:TYPO_SPELLING: 'doesnt' may be misspelled - perhaps 'doesn't'? #15: v3: xe3lpd doesnt supply the power control unit the voltage index ^^^^^^ total: 0 errors, 1 warnings, 0 checks, 89 lines checked 0fd854c304c3 drm/i915/xe3lpd: Include hblank restriction for xe3lpd -:23: ERROR:SPACING: spaces required around that '>=' (ctx:WxV) #23: FILE: drivers/gpu/drm/i915/display/intel_hdcp.c:54: + else if (DISPLAY_VER(display) >=30) ^ total: 1 errors, 0 warnings, 0 checks, 17 lines checked ec9b5ea3b80a drm/i915/xe3lpd: Add C20 Phy consolidated programming table 2349653366a5 drm/i915/xe3lpd: Add new bit range of MAX swing setup -:9: WARNING:TYPO_SPELLING: 'seperate' may be misspelled - perhaps 'separate'? #9: v2: implement as two seperate macros instead of a single macro ^^^^^^^^ -:32: CHECK:LINE_SPACING: Please don't use multiple blank lines #32: FILE: drivers/gpu/drm/i915/display/intel_alpm.c:334: + -:65: WARNING:LONG_LINE: line length of 108 exceeds 100 columns #65: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:299: +#define PORT_ALPM_CTL(port) _MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B) -:69: WARNING:LONG_LINE: line length of 115 exceeds 100 columns #69: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:303: +#define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val) REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val) -:70: WARNING:LONG_LINE: line length of 119 exceeds 100 columns #70: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:304: +#define XE3_PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val) REG_FIELD_PREP(XE3_PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val) -:72: WARNING:LONG_LINE: line length of 114 exceeds 100 columns #72: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:306: +#define PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(val) REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_HOLD_MASK, val) -:74: WARNING:LONG_LINE: line length of 110 exceeds 100 columns #74: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:308: +#define PORT_ALPM_CTL_SILENCE_PERIOD(val) REG_FIELD_PREP(PORT_ALPM_CTL_SILENCE_PERIOD_MASK, val) total: 0 errors, 6 warnings, 1 checks, 52 lines checked 85a432f18ce4 drm/i915/xe3lpd: Add check to see if edp over type c is allowed 8086d5e83ea3 drm/i915/xe3lpd: Add condition for EDP to powerdown P2.PG
