On Wed, 2024-10-09 at 14:40 +0000, Cavitt, Jonathan wrote:
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf
> Of Jouni Högander
> Sent: Wednesday, October 9, 2024 6:42 AM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: ville.syrjala@xxxxxxxxxxxxxxx; jani.nikula@xxxxxxxxxxxxxxx;
> Hogander, Jouni <jouni.hogander@xxxxxxxxx>
> Subject: [PATCH v2 1/2] drm/i915/display: Add own counter for Panel
> Replay vblank workaround
> >
> > We are about to change meaning of vblank_enabled to fix Panel
> > Replay vblank
> > workaround. For sake of clarity we need to rename it.
> > Vblank_enabled is
> > used for i915gm/i945gm vblank irq workaround as well -> instead of
> > rename
> > add new counter named as vblank_wa_pipes.
> >
> > v2:
> > - s/vblank_wa_pipes/vblank_wa_num_pipes/
> > - use int as a type for the counter
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@xxxxxxxxx>
>
> LGTM.
>
> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@xxxxxxxxx>
Thank you Jonathan for checking my patches. These are now pushed to
drm-intel-next.
BR,
Jouni Högander
> -Jonathan Cavitt
>
> > ---
> > drivers/gpu/drm/i915/display/intel_display_core.h | 2 ++
> > drivers/gpu/drm/i915/display/intel_display_irq.c | 8 ++++----
> > 2 files changed, 6 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> > b/drivers/gpu/drm/i915/display/intel_display_core.h
> > index 982dd9469195..45697af25fa9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> > @@ -455,6 +455,8 @@ struct intel_display {
> > /* For i915gm/i945gm vblank irq workaround */
> > u8 vblank_enabled;
> >
> > + int vblank_wa_num_pipes;
> > +
> > struct work_struct vblank_dc_work;
> >
> > u32 de_irq_mask[I915_MAX_PIPES];
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > index a4367ddc7a44..8226ea218d77 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > @@ -1424,7 +1424,7 @@ static void
> > intel_display_vblank_dc_work(struct work_struct *work)
> > struct intel_display *display =
> > container_of(work, typeof(*display),
> > irq.vblank_dc_work);
> > struct drm_i915_private *i915 = to_i915(display->drm);
> > - u8 vblank_enabled = READ_ONCE(display->irq.vblank_enabled);
> > + int vblank_wa_num_pipes = READ_ONCE(display-
> > >irq.vblank_wa_num_pipes);
> >
> > /*
> > * NOTE: intel_display_power_set_target_dc_state is used
> > only by PSR
> > @@ -1432,7 +1432,7 @@ static void
> > intel_display_vblank_dc_work(struct work_struct *work)
> > * PSR code. If DC3CO is taken into use we need take that
> > into account
> > * here as well.
> > */
> > - intel_display_power_set_target_dc_state(i915,
> > vblank_enabled ? DC_STATE_DISABLE :
> > + intel_display_power_set_target_dc_state(i915,
> > vblank_wa_num_pipes ? DC_STATE_DISABLE :
> > DC_STATE_EN_UPTO_DC
> > 6);
> > }
> >
> > @@ -1447,7 +1447,7 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
> > if (gen11_dsi_configure_te(crtc, true))
> > return 0;
> >
> > - if (display->irq.vblank_enabled++ == 0 && crtc-
> > >block_dc_for_vblank)
> > + if (display->irq.vblank_wa_num_pipes++ == 0 && crtc-
> > >block_dc_for_vblank)
> > schedule_work(&display->irq.vblank_dc_work);
> >
> > spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> > @@ -1478,7 +1478,7 @@ void bdw_disable_vblank(struct drm_crtc
> > *_crtc)
> > bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
> > spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> >
> > - if (--display->irq.vblank_enabled == 0 && crtc-
> > >block_dc_for_vblank)
> > + if (--display->irq.vblank_wa_num_pipes == 0 && crtc-
> > >block_dc_for_vblank)
> > schedule_work(&display->irq.vblank_dc_work);
> > }
> >
> > --
> > 2.34.1
> >
> >
