> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Imre
> Deak
> Sent: Wednesday, October 9, 2024 4:32 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: [PATCH 1/2] drm/i915/dp_mst: Handle error during DSC BW
> overhead/slice calculation
>
> The MST branch device may not support the number of DSC slices a mode
> requires, handle the error in this case.
>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
I feel this is a better implementation of the fix I had sent
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 39 ++++++++++++++-------
> 1 file changed, 27 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 4765bda154c15..2822ae1160034 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -90,27 +90,19 @@ static int intel_dp_mst_max_dpt_bpp(const struct
> intel_crtc_state *crtc_state,
>
> static int intel_dp_mst_bw_overhead(const struct intel_crtc_state
> *crtc_state,
> const struct intel_connector *connector,
> - bool ssc, bool dsc, int bpp_x16)
> + bool ssc, int dsc_slice_count, int bpp_x16)
> {
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> unsigned long flags = DRM_DP_BW_OVERHEAD_MST;
> - int dsc_slice_count = 0;
> int overhead;
>
> flags |= intel_dp_is_uhbr(crtc_state) ?
> DRM_DP_BW_OVERHEAD_UHBR : 0;
> flags |= ssc ? DRM_DP_BW_OVERHEAD_SSC_REF_CLK : 0;
> flags |= crtc_state->fec_enable ? DRM_DP_BW_OVERHEAD_FEC : 0;
>
> - if (dsc) {
> - int num_joined_pipes =
> intel_crtc_num_joined_pipes(crtc_state);
> -
> + if (dsc_slice_count)
> flags |= DRM_DP_BW_OVERHEAD_DSC;
> - dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
> - adjusted_mode-
> >clock,
> - adjusted_mode-
> >hdisplay,
> -
> num_joined_pipes);
> - }
>
> overhead = drm_dp_bw_overhead(crtc_state->lane_count,
> adjusted_mode->hdisplay,
> @@ -156,6 +148,19 @@ static int intel_dp_mst_calc_pbn(int pixel_clock, int
> bpp_x16, int bw_overhead)
> return DIV_ROUND_UP(effective_data_rate * 64, 54 * 1000); }
>
> +static int intel_dp_mst_dsc_get_slice_count(const struct intel_connector
> *connector,
> + const struct intel_crtc_state
> *crtc_state) {
> + const struct drm_display_mode *adjusted_mode =
> + &crtc_state->hw.adjusted_mode;
> + int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
> +
> + return intel_dp_dsc_get_slice_count(connector,
> + adjusted_mode->clock,
> + adjusted_mode->hdisplay,
> + num_joined_pipes);
> +}
> +
> static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder
> *encoder,
> struct intel_crtc_state
> *crtc_state,
> int max_bpp,
> @@ -175,6 +180,7 @@ static int
> intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> int bpp, slots = -EINVAL;
> + int dsc_slice_count = 0;
> int max_dpt_bpp;
> int ret = 0;
>
> @@ -206,6 +212,15 @@ static int
> intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
> drm_dbg_kms(&i915->drm, "Looking for slots in range min bpp %d
> max bpp %d\n",
> min_bpp, max_bpp);
>
> + if (dsc) {
> + dsc_slice_count =
> intel_dp_mst_dsc_get_slice_count(connector, crtc_state);
> + if (!dsc_slice_count) {
> + drm_dbg_kms(&i915->drm, "Can't get valid DSC slice
> count\n");
> +
> + return -ENOSPC;
> + }
> + }
> +
> for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
> int local_bw_overhead;
> int remote_bw_overhead;
> @@ -219,9 +234,9 @@ static int
> intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
> intel_dp_output_bpp(crtc_state-
> >output_format, bpp));
>
> local_bw_overhead = intel_dp_mst_bw_overhead(crtc_state,
> connector,
> - false, dsc,
> link_bpp_x16);
> + false,
> dsc_slice_count, link_bpp_x16);
> remote_bw_overhead =
> intel_dp_mst_bw_overhead(crtc_state, connector,
> - true, dsc,
> link_bpp_x16);
> + true,
> dsc_slice_count, link_bpp_x16);
>
> intel_dp_mst_compute_m_n(crtc_state, connector,
> local_bw_overhead,
> --
> 2.44.2
