From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Finish the gen2 16->32 bit irq register conversion.
I also wanted to check if the damn thing was executing
something, and figured I could just run intel_gpu_top.
Turns out it wasn't quite that simple because the pmu code
lacks gen2 support. So I had to remedy that (and fix
intel_gpu_top to even start on pre-snb, but that's a
userspace bug).
Ville Syrjälä (4):
drm/i915/gt: Nuke gen2_irq_{enable,disable}()
drm/i915/gt: s/gen3/gen2/
drm/i915/irq: s/gen3/gen2/
drm/i915/pmu: Add support for gen2
.../gpu/drm/i915/display/intel_display_irq.c | 50 +++++++++----------
drivers/gpu/drm/i915/gt/gen2_engine_cs.c | 23 ++-------
drivers/gpu/drm/i915/gt/gen2_engine_cs.h | 6 +--
drivers/gpu/drm/i915/gt/intel_engine_regs.h | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 24 ++++-----
.../gpu/drm/i915/gt/intel_ring_submission.c | 7 +--
drivers/gpu/drm/i915/i915_irq.c | 36 ++++++-------
drivers/gpu/drm/i915/i915_irq.h | 6 +--
drivers/gpu/drm/i915/i915_pmu.c | 32 +++++++++---
drivers/gpu/drm/xe/display/ext/i915_irq.c | 8 +--
10 files changed, 96 insertions(+), 98 deletions(-)
--
2.45.2
