On Thu, Oct 03, 2024 at 10:50:24PM +0200, Maarten Lankhorst wrote: > Hello, > > Den 2024-10-03 kl. 18:14, skrev Ville Syrjälä: > > On Thu, Oct 03, 2024 at 05:44:12PM +0200, Maarten Lankhorst wrote: > >> I'm planning to reorder readout in the Xe sequence in such a way that > >> interrupts will not be available, so just use an async flip. > >> > >> Since the new FB points to the same pages, it will not tear. It also > >> has the benefit of perhaps being slightly faster. > >> > >> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > >> --- > >> drivers/gpu/drm/i915/display/skl_universal_plane.c | 13 +++++++++++-- > >> 1 file changed, 11 insertions(+), 2 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c > >> index fdb141cfa4274..73a3624e34098 100644 > >> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c > >> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c > >> @@ -2800,7 +2800,7 @@ bool skl_fixup_initial_plane_config(struct intel_crtc *crtc, > >> to_intel_plane_state(plane->base.state); > >> enum plane_id plane_id = plane->id; > >> enum pipe pipe = crtc->pipe; > >> - u32 base; > >> + u32 base, plane_ctl; > >> > >> if (!plane_state->uapi.visible) > >> return false; > >> @@ -2814,7 +2814,16 @@ bool skl_fixup_initial_plane_config(struct intel_crtc *crtc, > >> if (plane_config->base == base) > >> return false; > >> > >> + /* Perform an async flip to the new surface. */ > >> + plane_ctl = intel_read(i915, PLANE_CTL(pipe, plane_id)); > >> + plane_ctl |= PLANE_CTL_ASYNC_FLIP; > >> + > > > > No async flips! > > Can you please explain your reasoning? Async flips are special. They have all kinds of random hardware limitations. > I think async flip would fit > perfectly here. We cannot perform a wait_for_vblank as we will not have > interrupts enabled yet. The type of flip is irrelevant when you just poll until it's done. > Additionally an async flip would cause a faster > driver loading. Since the FB is exactly the same except set to a > different address, no tearing will occur. Until we violate some hardware requirement and you get a fault. -- Ville Syrjälä Intel
