We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't prevent DC6 in case of Panel Replay. This causes problems if user-space is polling for vblank events. For this purpose add new block_dc6_needed variable into intel_crtc. Signed-off-by: Jouni Högander <jouni.hogander@xxxxxxxxx> --- .../gpu/drm/i915/display/intel_display_irq.c | 28 +++++++++++++++++++ .../gpu/drm/i915/display/intel_display_irq.h | 3 ++ .../drm/i915/display/intel_display_types.h | 7 +++++ drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++ 4 files changed, 45 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c index 8f13f148c73e3..7ff721bcec0d3 100644 --- a/drivers/gpu/drm/i915/display/intel_display_irq.c +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c @@ -1361,6 +1361,34 @@ static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc, return true; } +/** + * block_dc6_on_vblank_get - get block DC6 entry reference + * + * @_crtc: drm crtc pointer + * + * This function is called from Panel Replay code when Panel Replay gets + * activated. Intention is to block DC6 entry when VBI is enabled and Panel + * Replay is active. + */ +void block_dc6_on_vblank_get(struct drm_crtc *_crtc) +{ + to_intel_crtc(_crtc)->block_dc6_needed++; +} + +/** + * block_dc6_on_vblank_put - free block DC6 entry reference + * + * @crtc: drm crtc pointer + * + * This function is called from Panel Replay code when Panel Replay is + * deactivated. Intention is to block DC6 entry when VBI is enabled and Panel + * Replay is active. + */ +void block_dc6_on_vblank_put(struct drm_crtc *crtc) +{ + to_intel_crtc(crtc)->block_dc6_needed--; +} + int bdw_enable_vblank(struct drm_crtc *_crtc) { struct intel_crtc *crtc = to_intel_crtc(_crtc); diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h index 2a090dd6abd7c..fe3ada8f37283 100644 --- a/drivers/gpu/drm/i915/display/intel_display_irq.h +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h @@ -77,6 +77,9 @@ void i965_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_ void valleyview_pipestat_irq_handler(struct drm_i915_private *i915, u32 pipe_stats[I915_MAX_PIPES]); void i8xx_pipestat_irq_handler(struct drm_i915_private *i915, u16 iir, u32 pipe_stats[I915_MAX_PIPES]); +void block_dc6_on_vblank_get(struct drm_crtc *crtc); +void block_dc6_on_vblank_put(struct drm_crtc *crtc); + void intel_display_irq_init(struct drm_i915_private *i915); #endif /* __INTEL_DISPLAY_IRQ_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 000ab373c8879..df0c3eb750809 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1413,6 +1413,13 @@ struct intel_crtc { #ifdef CONFIG_DEBUG_FS struct intel_pipe_crc pipe_crc; #endif + + /* + * We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't + * prevent DC6 in case of Panel Replay. This causes problems if user-space is + * polling for vblank events. + */ + u8 block_dc6_needed; }; struct intel_plane { diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 1a4ef231a53ca..f9e5177893c46 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -35,6 +35,7 @@ #include "intel_cursor_regs.h" #include "intel_ddi.h" #include "intel_de.h" +#include "intel_display_irq.h" #include "intel_display_types.h" #include "intel_dp.h" #include "intel_dp_aux.h" @@ -970,6 +971,9 @@ static void dg2_activate_panel_replay(struct intel_dp *intel_dp) val); } + if (intel_dp_is_edp(intel_dp)) + block_dc6_on_vblank_get(&intel_crtc_for_pipe(display, intel_dp->psr.pipe)->base); + intel_de_rmw(display, PSR2_MAN_TRK_CTL(display, intel_dp->psr.transcoder), 0, ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME); @@ -2005,6 +2009,9 @@ static void intel_psr_exit(struct intel_dp *intel_dp) } if (intel_dp->psr.panel_replay_enabled) { + if (intel_dp_is_edp(intel_dp)) + block_dc6_on_vblank_put(drm_crtc_from_index(display->drm, + intel_dp->psr.pipe)); intel_de_rmw(display, TRANS_DP2_CTL(intel_dp->psr.transcoder), TRANS_DP2_PANEL_REPLAY_ENABLE, 0); } else if (intel_dp->psr.sel_update_enabled) { -- 2.34.1