RE: [PATCH] drm/i915/pciid: Add new PCI id for ARL

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> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> Dnyaneshwar Bhadane
> Sent: Tuesday, September 10, 2024 11:53 AM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Bhadane, Dnyaneshwar <dnyaneshwar.bhadane@xxxxxxxxx>
> Subject: [PATCH] drm/i915/pciid: Add new PCI id for ARL
> 
> Add new PCI id for ARL platform.
> 
> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@xxxxxxxxx>
Reviewed-by: Nemesa Garg <nemesa.garg@xxxxxxxxx>
> ---
>  include/drm/intel/i915_pciids.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/include/drm/intel/i915_pciids.h b/include/drm/intel/i915_pciids.h
> index cbb12fdbcb7f..02156c6f79b6 100644
> --- a/include/drm/intel/i915_pciids.h
> +++ b/include/drm/intel/i915_pciids.h
> @@ -769,7 +769,8 @@
>  	MACRO__(0x7D41, ## __VA_ARGS__), \
>  	MACRO__(0x7D51, ## __VA_ARGS__), \
>  	MACRO__(0x7D67, ## __VA_ARGS__), \
> -	MACRO__(0x7DD1, ## __VA_ARGS__)
> +	MACRO__(0x7DD1, ## __VA_ARGS__), \
> +	MACRO__(0xB640, ## __VA_ARGS__)
> LGTM
>  /* MTL */
>  #define INTEL_MTL_IDS(MACRO__, ...) \
> --
> 2.34.1





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