> -----Original Message-----
> From: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Sent: Tuesday, August 27, 2024 1:41 PM
> To: Murthy, Arun R <arun.r.murthy@xxxxxxxxx>; intel-xe@xxxxxxxxxxxxxxxxxxxxx;
> intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: RE: [PATCH] drm/i915/display: BMG supports UHBR13.5
>
> On Tue, 27 Aug 2024, Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> wrote:
> > On Tue, 27 Aug 2024, "Murthy, Arun R" <arun.r.murthy@xxxxxxxxx> wrote:
> >>> -----Original Message-----
> >>> From: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> >>> Sent: Tuesday, August 27, 2024 1:11 PM
> >>> To: Murthy, Arun R <arun.r.murthy@xxxxxxxxx>;
> >>> intel-xe@xxxxxxxxxxxxxxxxxxxxx; intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> >>> Cc: Murthy, Arun R <arun.r.murthy@xxxxxxxxx>
> >>> Subject: Re: [PATCH] drm/i915/display: BMG supports UHBR13.5
> >>>
> >>> On Tue, 27 Aug 2024, Arun R Murthy <arun.r.murthy@xxxxxxxxx> wrote:
> >>> > UHBR20 is not supported by battlemage and the maximum link rate
> >>> > supported is UHBR13.5
> >>> >
> >>> > HSD: 16023263677
> >>> > Signed-off-by: Arun R Murthy <arun.r.murthy@xxxxxxxxx>
> >>> > ---
> >>> > drivers/gpu/drm/i915/display/intel_dp.c | 13 +++++++++++--
> >>> > 1 file changed, 11 insertions(+), 2 deletions(-)
> >>> >
> >>> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> >>> > b/drivers/gpu/drm/i915/display/intel_dp.c
> >>> > index 789c2f78826d..3232ec4b2889 100644
> >>> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >>> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >>> > @@ -528,6 +528,10 @@ static void
> >>> > intel_dp_set_source_rates(struct intel_dp *intel_dp) {
> >>> > /* The values must be in increasing order */
> >>> > + static const int bmg_rates[] = {
> >>> > + 162000, 216000, 243000, 270000, 324000, 432000, 540000,
> >>> 675000,
> >>> > + 810000, 1000000, 1350000,
> >>> > + };
> >>> > static const int mtl_rates[] = {
> >>> > 162000, 216000, 243000, 270000, 324000, 432000, 540000,
> >>> 675000,
> >>> > 810000, 1000000, 2000000,
> >>> > @@ -558,8 +562,13 @@ intel_dp_set_source_rates(struct intel_dp
> *intel_dp)
> >>> > intel_dp->source_rates || intel_dp->num_source_rates);
> >>> >
> >>> > if (DISPLAY_VER(dev_priv) >= 14) {
> >>> > - source_rates = mtl_rates;
> >>> > - size = ARRAY_SIZE(mtl_rates);
> >>> > + if (IS_DGFX(dev_priv)) {
> >>>
> >>> Why dgfx instead of bmg? Should be explained in commit message at
> >>> the very least.
> >>>
> >> Likewise IS_DH2 / IS_MTL we don't have IS_BMG as its Display 14.1. One of
> the way to differentiate this is DISPLAY < 14 are integrated and this BMG is
> discrete and hence using IS_DGFX() for identifying BMG platform.
> >
> > But isn't dgfx completely incidental here?
>
> We can check for display 14.1 and we can check for IS_BATTLEMAGE().
>
Thanks, will use IS_BATTLEMAGE and since the platform check is available, I don't think DISPLAY 14.1 may not be required at the moment.
Thanks and Regards,
Arun R Murthy
--------------------
>
> >
> >>
> >> Will add this in the commit message if not other comments and get Rb on
> this patch.
> >>
> >> Thanks and Regards,
> >> Arun R Murthy
> >> -------------------
> >>
> >>> BR,
> >>> Jani.
> >>>
> >>> > + source_rates = bmg_rates;
> >>> > + size = ARRAY_SIZE(bmg_rates);
> >>> > + } else {
> >>> > + source_rates = mtl_rates;
> >>> > + size = ARRAY_SIZE(mtl_rates);
> >>> > + }
> >>> > max_rate = mtl_max_source_rate(intel_dp);
> >>> > } else if (DISPLAY_VER(dev_priv) >= 11) {
> >>> > source_rates = icl_rates;
> >>>
> >>> --
> >>> Jani Nikula, Intel
>
> --
> Jani Nikula, Intel
