Hi Nitin, On Wed, Jul 31, 2024 at 09:26:14PM +0530, Nitin Gote wrote: > Wa_14019789679 implementation for MTL, ARL and DG2. > > v2: Corrected condition > > v3: > - Fix indentation (Jani Nikula) > - dword size should be 0x1 and > initialize dword to 0 instead of MI_NOOP (Tejas) > - Use IS_GFX_GT_IP_RANGE() (Tejas) > > v4: > - 3DSTATE_MESH_CONTROL instruction is 3 dwords long > Align with dword size. (Roper, Matthew D) > - Add RCS engine check. (Tejas) > > Bspec: 47083 > > Signed-off-by: Nitin Gote <nitin.r.gote@xxxxxxxxx> merged to drm-intel-gt-next. I also added the "gt" tag after "drm/i915" in the title. Thanks, Andi
