> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Ankit
> Nautiyal
> Sent: Thursday, July 18, 2024 1:48 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Lisovskiy, Stanislav <stanislav.lisovskiy@xxxxxxxxx>; Saarinen, Jani
> <jani.saarinen@xxxxxxxxx>; ville.syrjala@xxxxxxxxxxxxxxx
> Subject: [PATCH 10/12] drm/i915: Compute config and mode valid changes
> for ultrajoiner
>
> From: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
>
> Implement required changes for mode validation and compute config, to
> support Ultrajoiner.
> This also includes required DSC changes and checks.
>
> v2:
> -Use enum for Ultrajoiner pipes.
> -Drop changes for HDMI.
> -Separate out DSC changes into another patch.
>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx>
> ---
> .../drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 70 +++++++++++++++----
> drivers/gpu/drm/i915/display/intel_dp.h | 7 +-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 ++--
> 4 files changed, 70 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 14c78b18ffa1..a36881b047e3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -616,6 +616,7 @@ struct intel_hdcp {
> enum intel_joiner_pipe_count {
> INTEL_PIPE_JOINER_NONE = 0,
> INTEL_PIPE_JOINER_BIG = 2,
> + INTEL_PIPE_JOINER_ULTRA = 4,
> INTEL_PIPE_JOINER_INVALID,
> };
This should be introduced in one of the earlier patches
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index ff4c123de0ed..c0a1f2603274 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -755,24 +755,33 @@ u32 get_max_compressed_bpp_with_joiner(struct
> drm_i915_private *i915,
> enum intel_joiner_pipe_count
> joined_pipes) {
> u32 max_bpp_small_joiner_ram;
> + u32 max_bpp_joiner;
>
> /* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz.
> width */
> max_bpp_small_joiner_ram = small_joiner_ram_size_bits(i915) /
> mode_hdisplay;
> + max_bpp_joiner = max_bpp_small_joiner_ram;
>
> - if (joined_pipes == INTEL_PIPE_JOINER_BIG) {
> - int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 :
> 24;
> + /* if ultra joiner is enabled, we have 2 bigjoiners enabled */
> + if (joined_pipes == INTEL_PIPE_JOINER_BIG ||
> + joined_pipes == INTEL_PIPE_JOINER_ULTRA) {
> + int joiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24;
> /* With bigjoiner multiple dsc engines are used in parallel
> so PPC is 2 */
> int ppc = 2;
Also unrelated but should we assign ppc based on number of dsc engine used rather than hardcoding it
> - u32 max_bpp_bigjoiner =
> - i915->display.cdclk.max_cdclk_freq * ppc *
> bigjoiner_interface_bits /
> + max_bpp_joiner =
> + i915->display.cdclk.max_cdclk_freq * ppc *
> joiner_interface_bits /
> intel_dp_mode_to_fec_clock(mode_clock);
>
> max_bpp_small_joiner_ram *= 2;
>
> - return min(max_bpp_small_joiner_ram,
> max_bpp_bigjoiner);
> + return min(max_bpp_small_joiner_ram, max_bpp_joiner);
> + }
> + if (joined_pipes == INTEL_PIPE_JOINER_ULTRA) {
> + /* both get multiplied by 2, because ram bits/ppc now
> doubled */
> + max_bpp_small_joiner_ram *= 2;
> + max_bpp_joiner *= 2;
> }
>
> - return max_bpp_small_joiner_ram;
> + return min(max_bpp_small_joiner_ram, max_bpp_joiner);
> }
>
> u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private
> *i915, @@ -878,6 +887,10 @@ u8 intel_dp_dsc_get_slice_count(const struct
> intel_connector *connector,
> if (joined_pipes == INTEL_PIPE_JOINER_BIG &&
> test_slice_count < 4)
> continue;
>
> + /* ultrajoiner needs 2 bigjoiners to be enabled */
> + if (joined_pipes == INTEL_PIPE_JOINER_ULTRA &&
> test_slice_count < 8)
> + continue;
> +
> if (min_slice_count <= test_slice_count)
> return test_slice_count;
> }
> @@ -1154,9 +1167,9 @@ intel_dp_mode_valid_downstream(struct
> intel_connector *connector,
> return MODE_OK;
> }
>
> -bool intel_dp_need_joiner(struct intel_dp *intel_dp,
> - struct intel_connector *connector,
> - int hdisplay, int clock)
> +bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,
> + struct intel_connector *connector,
> + int hdisplay, int clock)
> {
> struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>
> @@ -1187,6 +1200,25 @@ bool intel_dp_has_dsc(const struct
> intel_connector *connector)
> return true;
> }
>
> +static
> +bool intel_can_ultrajoiner(const struct intel_encoder *encoder) {
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + return IS_DGFX(i915) && DISPLAY_VER(i915) >= 14; }
> +
> +bool intel_dp_need_ultrajoiner(struct intel_dp *dp, int clock) {
> + const struct intel_encoder *encoder = &dp_to_dig_port(dp)->base;
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + if (!intel_can_ultrajoiner(encoder))
> + return false;
> +
> + return clock > (i915->display.cdclk.max_dotclk_freq * 2); }
> +
> static enum drm_mode_status
> intel_dp_mode_valid(struct drm_connector *_connector,
> struct drm_display_mode *mode)
> @@ -1223,11 +1255,15 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> target_clock = fixed_mode->clock;
> }
>
> - if (intel_dp_need_joiner(intel_dp, connector,
> - mode->hdisplay, target_clock)) {
> + if (intel_dp_need_ultrajoiner(intel_dp, target_clock)) {
> + joined_pipes = INTEL_PIPE_JOINER_ULTRA;
> + max_dotclk *= INTEL_PIPE_JOINER_ULTRA;
> + } else if (intel_dp_need_bigjoiner(intel_dp, connector,
> + mode->hdisplay, target_clock)) {
> joined_pipes = INTEL_PIPE_JOINER_BIG;
> max_dotclk *= INTEL_PIPE_JOINER_BIG;
> }
> +
> if (target_clock > max_dotclk)
> return MODE_CLOCK_HIGH;
>
> @@ -2401,8 +2437,10 @@ bool intel_dp_joiner_needs_dsc(struct
> drm_i915_private *i915,
> * Pipe joiner needs compression up to display 12 due to bandwidth
> * limitation. DG2 onwards pipe joiner can be enabled without
> * compression.
> + * Ultrajoiner always needs compression.
> */
> - return DISPLAY_VER(i915) < 13 && (joined_pipes ==
> INTEL_PIPE_JOINER_BIG);
> + return (DISPLAY_VER(i915) < 13 && (joined_pipes ==
> INTEL_PIPE_JOINER_BIG)) ||
> + joined_pipes == INTEL_PIPE_JOINER_ULTRA;
> }
>
> static int
> @@ -2427,9 +2465,11 @@ intel_dp_compute_link_config(struct
> intel_encoder *encoder,
> !intel_dp_supports_fec(intel_dp, connector, pipe_config))
> return -EINVAL;
>
> - if (intel_dp_need_joiner(intel_dp, connector,
> - adjusted_mode->crtc_hdisplay,
> - adjusted_mode->crtc_clock))
> + if (intel_dp_need_ultrajoiner(intel_dp, adjusted_mode->crtc_clock))
> + pipe_config->joiner_pipes = GENMASK(crtc->pipe + 3, crtc-
> >pipe);
> + else if (intel_dp_need_bigjoiner(intel_dp, connector,
> + adjusted_mode->crtc_hdisplay,
> + adjusted_mode->crtc_clock))
> pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc-
> >pipe);
>
> joined_pipes = intel_joiner_num_pipes(pipe_config);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index acd05dc7b8ad..6c607a218fbc 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -153,9 +153,10 @@ int intel_dp_dsc_sink_max_compressed_bpp(const
> struct intel_connector *connector
> u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
> int mode_clock, int mode_hdisplay,
> enum intel_joiner_pipe_count joined_pipes);
> -bool intel_dp_need_joiner(struct intel_dp *intel_dp,
> - struct intel_connector *connector,
> - int hdisplay, int clock);
> +bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,
> + struct intel_connector *connector,
> + int hdisplay, int clock);
> +bool intel_dp_need_ultrajoiner(struct intel_dp *intel_dp, int clock);
>
> static inline unsigned int intel_dp_unused_lane_mask(int lane_count) { diff
> --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 31a2acb7fa11..21b23f8eb5e7 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -579,9 +579,11 @@ static int intel_dp_mst_compute_config(struct
> intel_encoder *encoder,
> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> return -EINVAL;
>
> - if (intel_dp_need_joiner(intel_dp, connector,
> - adjusted_mode->crtc_hdisplay,
> - adjusted_mode->crtc_clock))
> + if (intel_dp_need_ultrajoiner(intel_dp, adjusted_mode->crtc_clock))
> + pipe_config->joiner_pipes = GENMASK(crtc->pipe + 3, crtc-
> >pipe);
> + else if (intel_dp_need_bigjoiner(intel_dp, connector,
> + adjusted_mode->crtc_hdisplay,
> + adjusted_mode->crtc_clock))
> pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc-
> >pipe);
>
> pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; @@ -
> 1439,8 +1441,11 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector
> *connector,
> * corresponding link capabilities of the sink) in case the
> * stream is uncompressed for it by the last branch device.
> */
> - if (intel_dp_need_joiner(intel_dp, intel_connector,
> - mode->hdisplay, target_clock)) {
> + if (intel_dp_need_ultrajoiner(intel_dp, target_clock)) {
> + joined_pipes = INTEL_PIPE_JOINER_BIG;
> + max_dotclk *= INTEL_PIPE_JOINER_BIG;
Should this not be ULTRA
Regards,
Suraj Kandpal
> + } else if (intel_dp_need_bigjoiner(intel_dp, intel_connector,
> + mode->hdisplay, target_clock)) {
> joined_pipes = INTEL_PIPE_JOINER_BIG;
> max_dotclk *= INTEL_PIPE_JOINER_BIG;
> }
> --
> 2.45.2
