drm/i915/gt: Rename "cslises" variable to clarify its purpose
The "cslises" variable stores the mask of the CCS engines after
calculating the fused ones and before setting the CCS mode.
Since it represents a mask and not the number of CCS slices,
rename it to reflect its actual purpose to avoid confusion.
No functional changes intended.
Signed-off-by: Andi Shyti <andi.shyti@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_types.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 3b740ca25000..ea908dbec2ab 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -889,7 +889,7 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt *gt)
* Store the number of active cslices before
* changing the CCS engine configuration
*/
- gt->ccs.cslices = CCS_MASK(gt);
+ gt->ccs.cslice_mask = CCS_MASK(gt);
/* Mask off all the CCS engine */
info->engine_mask &= ~GENMASK(CCS3, CCS0);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
index 3c62a44e9106..109b13b4017d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
@@ -19,7 +19,7 @@ unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt)
/* Build the value for the fixed CCS load balancing */
for (cslice = 0; cslice < I915_MAX_CCS; cslice++) {
- if (gt->ccs.cslices & BIT(cslice))
+ if (gt->ccs.cslice_mask & BIT(cslice))
/*
* If available, assign the cslice
* to the first available engine...
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index cfdd2ad5e954..3c9fae53871a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -212,7 +212,7 @@ struct intel_gt {
* Mask of the non fused CCS slices
* to be used for the load balancing
*/
- intel_engine_mask_t cslices;
+ intel_engine_mask_t cslice_mask;
} ccs;
/*
--
2.45.2
