> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Mitul
> Golani
> Sent: Wednesday, June 19, 2024 4:08 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: [PATCH v3] drm/i915/display: WA for Re-initialize dispcnlunitt1 xosc clock
>
> The dispcnlunit1_cp_xosc_clk should be de-asserted in display off and only
> asserted in display on. But during observation it found clk remains active in display
> OFF. As workaround, Display driver shall execute set-reset sequence at the end of
> the Initialize Sequence.
>
> Wa_15013987218
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@xxxxxxxxx>
Reviewed-by: Nemesa Garg <nemesa.garg@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> b/drivers/gpu/drm/i915/display/intel_display_power.c
> index e288a1b21d7e..aef54c1a2ba9 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1704,6 +1704,14 @@ static void icl_display_core_init(struct
> drm_i915_private *dev_priv,
> /* Wa_14011503030:xelpd */
> if (DISPLAY_VER(dev_priv) == 13)
> intel_de_write(dev_priv, XELPD_DISPLAY_ERR_FATAL_MASK,
> ~0);
> +
> + /* Wa_15013987218 */
> + if (DISPLAY_VER(dev_priv) == 20) {
> + intel_de_write(dev_priv, SOUTH_DSPCLK_GATE_D,
> + PCH_GMBUSUNIT_CLOCK_GATE_DISABLE);
Nit: we can replace the above statement with this intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, 0, PCH_GMBUSUNIT_CLOCK_GATE_DISABLE) so that code consistency can be maintained in the code block.
otherwise LGTM.
> + intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D,
> + PCH_GMBUSUNIT_CLOCK_GATE_DISABLE, 0);
> + }
> }
>
> static void icl_display_core_uninit(struct drm_i915_private *dev_priv)
> --
> 2.45.2
