> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@xxxxxxxxx>
> Sent: Tuesday, June 18, 2024 8:30 AM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Manna, Animesh <animesh.manna@xxxxxxxxx>; Kahola, Mika
> <mika.kahola@xxxxxxxxx>; Hogander, Jouni <jouni.hogander@xxxxxxxxx>
> Subject: [PATCH 1/9] drm/i915/psr: Set SU area width as pipe src width
>
> Currently SU area width is set as MAX_INT. This is causing problems. Instead set it as
> pipe src width.
>
> Fixes: 86b26b6aeac7 ("drm/i915/psr: Carry su area in crtc_state")
>
Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx>
> Signed-off-by: Jouni Högander <jouni.hogander@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 920186c2264d..3f36b94020ff 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2316,7 +2316,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state
> *state,
>
> crtc_state->psr2_su_area.x1 = 0;
> crtc_state->psr2_su_area.y1 = -1;
> - crtc_state->psr2_su_area.x2 = INT_MAX;
> + crtc_state->psr2_su_area.x2 = drm_rect_width(&crtc_state->pipe_src);
> crtc_state->psr2_su_area.y2 = -1;
>
> /*
> --
> 2.34.1
