== Series Details == Series: Panel Replay eDP more prepare patches URL : https://patchwork.freedesktop.org/series/134991/ State : warning == Summary == Error: dim checkpatch failed 2478831dfb07 drm/i915/psr: Set SU area width as pipe src width 80e2348b5cb0 drm/i915/display: Wa 16021440873 is writing wrong register 526b0dc96c26 drm/i915/alpm: Fix port clock usage in AUX Less wake time calculation f99f913ec74a drm/i915/psr: Disable Panel Replay if PSR mode is set via module parameter 5098b919852f drm/i915/psr: Disable PSR2 SU Region ET if enable_psr module parameter is set d1fb0d28d895 drm/i915/psr: Disable PSR/Panel Replay on sink side for PSR only c9234652b499 drm/i915/psr: Add new debug bit to disable Panel Replay b849a5b71aac Revert "drm/i915/psr: Disable early transport by default" 2c8b002eee7a intel_alpm: Fix wrong offset for PORT_ALPM_* registers -:55: WARNING:MACRO_ARG_UNUSED: Argument 'dev_priv' is not used in function-like macro #55: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:298: +#define PORT_ALPM_CTL(dev_priv, port) _MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B) -:65: WARNING:LONG_LINE: line length of 126 exceeds 100 columns #65: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:309: +#define PORT_ALPM_LFPS_CTL(dev_priv, port) _MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B) -:65: WARNING:MACRO_ARG_UNUSED: Argument 'dev_priv' is not used in function-like macro #65: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:309: +#define PORT_ALPM_LFPS_CTL(dev_priv, port) _MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B) total: 0 errors, 3 warnings, 0 checks, 41 lines checked
