> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@xxxxxxxxx>
> Sent: Thursday, June 13, 2024 3:02 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Manna, Animesh <animesh.manna@xxxxxxxxx>; Kahola, Mika
> <mika.kahola@xxxxxxxxx>; Hogander, Jouni <jouni.hogander@xxxxxxxxx>
> Subject: [PATCH v8 07/20] drm/i915/psr: Disable PSR/Panel Replay on sink
> side for PSR only
>
> Enabling/disabling Panel Replay on sink side has to be done before link
> training. We can't disable it in sink side on PSR disable.
>
> Fixes: 88ae6c65ecdb ("drm/i915/psr: Unify panel replay enable/disable sink")
> Signed-off-by: Jouni Högander <jouni.hogander@xxxxxxxxx>
Reviewed-by: Animesh Manna <animesh.manna@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 27cf330d13e2..7300d04806cd 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1974,13 +1974,13 @@ static void intel_psr_disable_locked(struct
> intel_dp *intel_dp)
> }
>
> /* Disable PSR on Sink */
> - drm_dp_dpcd_writeb(&intel_dp->aux,
> - intel_dp->psr.panel_replay_enabled ?
> - PANEL_REPLAY_CONFIG : DP_PSR_EN_CFG, 0);
> + if (!intel_dp->psr.panel_replay_enabled) {
> + drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
>
> - if (!intel_dp->psr.panel_replay_enabled &&
> - intel_dp->psr.sel_update_enabled)
> - drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_RECEIVER_ALPM_CONFIG, 0);
> + if (intel_dp->psr.sel_update_enabled)
> + drm_dp_dpcd_writeb(&intel_dp->aux,
> + DP_RECEIVER_ALPM_CONFIG, 0);
> + }
>
> intel_dp->psr.enabled = false;
> intel_dp->psr.panel_replay_enabled = false;
> --
> 2.34.1
