On Tue, Jun 04, 2024 at 06:26:23PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the MTL_CLKGATE_DIS_TRANS register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
I hope I didn't missed anything.
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 5 +++--
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4a4124a92a0d..21f6a4fa86a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1716,7 +1716,8 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
> if (!intel_dp->psr.panel_replay_enabled &&
> IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0))
> intel_de_rmw(dev_priv,
> - MTL_CLKGATE_DIS_TRANS(cpu_transcoder), 0,
> + MTL_CLKGATE_DIS_TRANS(dev_priv, cpu_transcoder),
> + 0,
> MTL_CLKGATE_DIS_TRANS_DMASC_GATING_DIS);
> else if (IS_ALDERLAKE_P(dev_priv))
> intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0,
> @@ -1897,7 +1898,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
> if (!intel_dp->psr.panel_replay_enabled &&
> IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0))
> intel_de_rmw(dev_priv,
> - MTL_CLKGATE_DIS_TRANS(cpu_transcoder),
> + MTL_CLKGATE_DIS_TRANS(dev_priv, cpu_transcoder),
> MTL_CLKGATE_DIS_TRANS_DMASC_GATING_DIS, 0);
> else if (IS_ALDERLAKE_P(dev_priv))
> intel_de_rmw(dev_priv, CLKGATE_DIS_MISC,
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8a1414ae72cb..7049a5ccefd9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4718,7 +4718,7 @@ enum skl_power_gate {
>
> #define _MTL_CLKGATE_DIS_TRANS_A 0x604E8
> #define _MTL_CLKGATE_DIS_TRANS_B 0x614E8
> -#define MTL_CLKGATE_DIS_TRANS(trans) _MMIO_TRANS2(dev_priv, trans, _MTL_CLKGATE_DIS_TRANS_A)
> +#define MTL_CLKGATE_DIS_TRANS(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _MTL_CLKGATE_DIS_TRANS_A)
> #define MTL_CLKGATE_DIS_TRANS_DMASC_GATING_DIS REG_BIT(7)
>
> #define MTL_MEM_SS_INFO_GLOBAL _MMIO(0x45700)
> --
> 2.39.2
>
