On Tue, Jun 04, 2024 at 06:25:23PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_HSYNC register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
> drivers/gpu/drm/i915/display/intel_pch_display.c | 2 +-
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 ++++----
> 5 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index af0d3159369e..f87a2170ac91 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -938,7 +938,8 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder,
>
> for_each_dsi_port(port, intel_dsi->ports) {
> dsi_trans = dsi_port_to_transcoder(port);
> - intel_de_write(dev_priv, TRANS_HSYNC(dsi_trans),
> + intel_de_write(dev_priv,
> + TRANS_HSYNC(dev_priv, dsi_trans),
> HSYNC_START(hsync_start - 1) | HSYNC_END(hsync_end - 1));
> }
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 997418fb7310..111f2c400ecd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2716,7 +2716,7 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
> intel_de_write(dev_priv, TRANS_HBLANK(dev_priv, cpu_transcoder),
> HBLANK_START(adjusted_mode->crtc_hblank_start - 1) |
> HBLANK_END(adjusted_mode->crtc_hblank_end - 1));
> - intel_de_write(dev_priv, TRANS_HSYNC(cpu_transcoder),
> + intel_de_write(dev_priv, TRANS_HSYNC(dev_priv, cpu_transcoder),
> HSYNC_START(adjusted_mode->crtc_hsync_start - 1) |
> HSYNC_END(adjusted_mode->crtc_hsync_end - 1));
>
> @@ -2822,7 +2822,7 @@ static void intel_get_transcoder_timings(struct intel_crtc *crtc,
> adjusted_mode->crtc_hblank_end = REG_FIELD_GET(HBLANK_END_MASK, tmp) + 1;
> }
>
> - tmp = intel_de_read(dev_priv, TRANS_HSYNC(cpu_transcoder));
> + tmp = intel_de_read(dev_priv, TRANS_HSYNC(dev_priv, cpu_transcoder));
> adjusted_mode->crtc_hsync_start = REG_FIELD_GET(HSYNC_START_MASK, tmp) + 1;
> adjusted_mode->crtc_hsync_end = REG_FIELD_GET(HSYNC_END_MASK, tmp) + 1;
>
> @@ -8194,7 +8194,7 @@ void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
> HACTIVE(640 - 1) | HTOTAL(800 - 1));
> intel_de_write(dev_priv, TRANS_HBLANK(dev_priv, cpu_transcoder),
> HBLANK_START(640 - 1) | HBLANK_END(800 - 1));
> - intel_de_write(dev_priv, TRANS_HSYNC(cpu_transcoder),
> + intel_de_write(dev_priv, TRANS_HSYNC(dev_priv, cpu_transcoder),
> HSYNC_START(656 - 1) | HSYNC_END(752 - 1));
> intel_de_write(dev_priv, TRANS_VTOTAL(cpu_transcoder),
> VACTIVE(480 - 1) | VTOTAL(525 - 1));
> diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
> index 625b1fedd54c..480c0e09434d 100644
> --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
> @@ -228,7 +228,7 @@ static void ilk_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_s
> intel_de_write(dev_priv, PCH_TRANS_HBLANK(pch_transcoder),
> intel_de_read(dev_priv, TRANS_HBLANK(dev_priv, cpu_transcoder)));
> intel_de_write(dev_priv, PCH_TRANS_HSYNC(pch_transcoder),
> - intel_de_read(dev_priv, TRANS_HSYNC(cpu_transcoder)));
> + intel_de_read(dev_priv, TRANS_HSYNC(dev_priv, cpu_transcoder)));
>
> intel_de_write(dev_priv, PCH_TRANS_VTOTAL(pch_transcoder),
> intel_de_read(dev_priv, TRANS_VTOTAL(cpu_transcoder)));
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 66e652119a7e..0d33815b91a4 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1219,7 +1219,7 @@
>
> #define TRANS_HTOTAL(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_HTOTAL_A)
> #define TRANS_HBLANK(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_HBLANK_A)
> -#define TRANS_HSYNC(trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_HSYNC_A)
> +#define TRANS_HSYNC(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_HSYNC_A)
> #define TRANS_VTOTAL(trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VTOTAL_A)
> #define TRANS_VBLANK(trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VBLANK_A)
> #define TRANS_VSYNC(trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNC_A)
> diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> index 47681fa69020..09d8960f7398 100644
> --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> @@ -233,7 +233,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter)
> MMIO_D(REG_50080(PIPE_C, PLANE_SPRITE0));
> MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_A));
> MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_A));
> - MMIO_D(TRANS_HSYNC(TRANSCODER_A));
> + MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_A));
> MMIO_D(TRANS_VTOTAL(TRANSCODER_A));
> MMIO_D(TRANS_VBLANK(TRANSCODER_A));
> MMIO_D(TRANS_VSYNC(TRANSCODER_A));
> @@ -242,7 +242,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter)
> MMIO_D(PIPESRC(TRANSCODER_A));
> MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_B));
> MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_B));
> - MMIO_D(TRANS_HSYNC(TRANSCODER_B));
> + MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_B));
> MMIO_D(TRANS_VTOTAL(TRANSCODER_B));
> MMIO_D(TRANS_VBLANK(TRANSCODER_B));
> MMIO_D(TRANS_VSYNC(TRANSCODER_B));
> @@ -251,7 +251,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter)
> MMIO_D(PIPESRC(TRANSCODER_B));
> MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_C));
> MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_C));
> - MMIO_D(TRANS_HSYNC(TRANSCODER_C));
> + MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_C));
> MMIO_D(TRANS_VTOTAL(TRANSCODER_C));
> MMIO_D(TRANS_VBLANK(TRANSCODER_C));
> MMIO_D(TRANS_VSYNC(TRANSCODER_C));
> @@ -260,7 +260,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter)
> MMIO_D(PIPESRC(TRANSCODER_C));
> MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_EDP));
> MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_EDP));
> - MMIO_D(TRANS_HSYNC(TRANSCODER_EDP));
> + MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_EDP));
> MMIO_D(TRANS_VTOTAL(TRANSCODER_EDP));
> MMIO_D(TRANS_VBLANK(TRANSCODER_EDP));
> MMIO_D(TRANS_VSYNC(TRANSCODER_EDP));
> --
> 2.39.2
>
