Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_DATA_M2 register macro. Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> --- drivers/gpu/drm/i915/display/intel_display.c | 6 ++++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 ++++---- 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 5eb4ad261c21..c2a2061a467d 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2660,7 +2660,8 @@ void intel_cpu_transcoder_set_m2_n2(struct intel_crtc *crtc, return; intel_set_m_n(dev_priv, m_n, - PIPE_DATA_M2(transcoder), PIPE_DATA_N2(transcoder), + PIPE_DATA_M2(dev_priv, transcoder), + PIPE_DATA_N2(transcoder), PIPE_LINK_M2(transcoder), PIPE_LINK_N2(transcoder)); } @@ -3357,7 +3358,8 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc, return; intel_get_m_n(dev_priv, m_n, - PIPE_DATA_M2(transcoder), PIPE_DATA_N2(transcoder), + PIPE_DATA_M2(dev_priv, transcoder), + PIPE_DATA_N2(transcoder), PIPE_LINK_M2(transcoder), PIPE_LINK_N2(transcoder)); } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 70c5fe687254..9c56df4c1f9f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2381,7 +2381,7 @@ #define PIPE_DATA_M1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_M1) #define PIPE_DATA_N1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N1) -#define PIPE_DATA_M2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_M2) +#define PIPE_DATA_M2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_M2) #define PIPE_DATA_N2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N2) #define PIPE_LINK_M1(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M1) #define PIPE_LINK_N1(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N1) diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index b9ad4eec4740..4199106f7202 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -268,7 +268,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_A)); MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_A)); - MMIO_D(PIPE_DATA_M2(TRANSCODER_A)); + MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_A)); MMIO_D(PIPE_DATA_N2(TRANSCODER_A)); MMIO_D(PIPE_LINK_M1(TRANSCODER_A)); MMIO_D(PIPE_LINK_N1(TRANSCODER_A)); @@ -276,7 +276,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_LINK_N2(TRANSCODER_A)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_B)); MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_B)); - MMIO_D(PIPE_DATA_M2(TRANSCODER_B)); + MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_B)); MMIO_D(PIPE_DATA_N2(TRANSCODER_B)); MMIO_D(PIPE_LINK_M1(TRANSCODER_B)); MMIO_D(PIPE_LINK_N1(TRANSCODER_B)); @@ -284,7 +284,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_LINK_N2(TRANSCODER_B)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_C)); MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_C)); - MMIO_D(PIPE_DATA_M2(TRANSCODER_C)); + MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_C)); MMIO_D(PIPE_DATA_N2(TRANSCODER_C)); MMIO_D(PIPE_LINK_M1(TRANSCODER_C)); MMIO_D(PIPE_LINK_N1(TRANSCODER_C)); @@ -292,7 +292,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_LINK_N2(TRANSCODER_C)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_EDP)); - MMIO_D(PIPE_DATA_M2(TRANSCODER_EDP)); + MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_DATA_N2(TRANSCODER_EDP)); MMIO_D(PIPE_LINK_M1(TRANSCODER_EDP)); MMIO_D(PIPE_LINK_N1(TRANSCODER_EDP)); -- 2.39.2
