On Thu, May 23, 2024 at 12:15:53PM +0300, Jani Nikula wrote: > On Thu, 16 May 2024, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Instead of that huge _PICK() let's use PICK_EVEN_2RANGES() > > for the SEL_FETCH_PLANE registers. A bit more tedious to have > > to define 8 raw register offsets for everything, but perhaps > > a bit easier to understand since we use a standard mechanism > > now instead of hand rolling the arithmetic. > > > > Also bloat-o-meter says: > > add/remove: 0/0 grow/shrink: 0/3 up/down: 0/-326 (-326) > > Function old new delta > > icl_plane_update_arm 510 446 -64 > > icl_plane_disable_sel_fetch_arm.isra 158 54 -104 > > icl_plane_update_noarm 1898 1740 -158 > > Total: Before=2574502, After=2574176, chg -0.01% > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > I just don't understand the old one. > > Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> > > > > --- > > drivers/gpu/drm/i915/display/intel_psr_regs.h | 45 ------------ > > .../i915/display/skl_universal_plane_regs.h | 68 +++++++++++++++++++ > > 2 files changed, 68 insertions(+), 45 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h > > index f0bd0a726d7a..289c371c98d1 100644 > > --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h > > +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h <snip> > > @@ -367,4 +378,61 @@ > > #define PLANE_BUF_START_MASK REG_GENMASK(11, 0) > > #define PLANE_BUF_START(start) REG_FIELD_PREP(PLANE_BUF_START_MASK, (start)) > > > > +#define _SEL_FETCH_PLANE_CTL_1_A 0x70890 /* mtl+ */ I noticed I had these bogus mtl+ comments here too, so changed those to tgl+ while pushing. Entire series is in now. Thanks for slogging through it. -- Ville Syrjälä Intel
