On Thu, 16 May 2024, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Bspec lists the mas TMDS bitrate as 6 Gbps on ADL/DG2. *max There's also ADL-S with display 12 and 6 Gbps support? BR, Jani. > Bump our limit to match. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_hdmi.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c > index 0faf2afa1c09..bd0ba4edcd1d 100644 > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c > @@ -1784,7 +1784,9 @@ static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder) > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > int max_tmds_clock, vbt_max_tmds_clock; > > - if (DISPLAY_VER(dev_priv) >= 10) > + if (DISPLAY_VER(dev_priv) >= 13) > + max_tmds_clock = 600000; > + else if (DISPLAY_VER(dev_priv) >= 10) > max_tmds_clock = 594000; > else if (DISPLAY_VER(dev_priv) >= 8 || IS_HASWELL(dev_priv)) > max_tmds_clock = 300000; -- Jani Nikula, Intel
