On Wed, May 08, 2024 at 06:47:56PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_VSYNC register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 9 ++++++---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 2 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 5031b7ac8007..fbfece3f687c 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -265,7 +265,8 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> TRANS_PUSH_EN);
>
> if (HAS_AS_SDP(dev_priv))
> - intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder),
> + intel_de_write(dev_priv,
> + TRANS_VRR_VSYNC(dev_priv, cpu_transcoder),
> VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
> VRR_VSYNC_START(crtc_state->vrr.vsync_start));
>
> @@ -290,7 +291,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> intel_de_write(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder), 0);
>
> if (HAS_AS_SDP(dev_priv))
> - intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder), 0);
> + intel_de_write(dev_priv,
> + TRANS_VRR_VSYNC(dev_priv, cpu_transcoder), 0);
> }
>
> void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
> @@ -326,7 +328,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
>
> if (HAS_AS_SDP(dev_priv)) {
> trans_vrr_vsync =
> - intel_de_read(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder));
> + intel_de_read(dev_priv,
> + TRANS_VRR_VSYNC(dev_priv, cpu_transcoder));
> crtc_state->vrr.vsync_start =
> REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync);
> crtc_state->vrr.vsync_end =
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9d443365b85a..7af0623bb9b5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1322,7 +1322,7 @@
> #define TRANS_PUSH_SEND REG_BIT(30)
>
> #define _TRANS_VRR_VSYNC_A 0x60078
> -#define TRANS_VRR_VSYNC(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VSYNC_A)
> +#define TRANS_VRR_VSYNC(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VSYNC_A)
> #define VRR_VSYNC_END_MASK REG_GENMASK(28, 16)
> #define VRR_VSYNC_END(vsync_end) REG_FIELD_PREP(VRR_VSYNC_END_MASK, (vsync_end))
> #define VRR_VSYNC_START_MASK REG_GENMASK(12, 0)
> --
> 2.39.2
>
