On Fri, 03 May 2024, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Define the contents of VBT block 57 (Vswing PreEmphasis Table).
>
> The contents is highly platform specific. The columns of the
> table corresponding to some set of PHY/etc registers. The rows
> corresponding to all legal vswing+pre-emphasis combinations
> (ie. should be 10 rows in each table). And each table
> corresponds to a platform specific (mostly undocumented)
> mapping based on link rate/eDP low-vswing/etc. parameters.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
I guess we should use this... but I'm not sure how.
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index 50d0d96fca67..0e5a2bf429f4 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -184,6 +184,7 @@ enum bdb_block_id {
> BDB_MIPI_SEQUENCE = 53, /* 177+ */
> BDB_RGB_PALETTE = 54, /* 180+ */
> BDB_COMPRESSION_PARAMETERS = 56, /* 213+ */
> + BDB_VSWING_PREEMPH = 57, /* 218+ */
> BDB_GENERIC_DTD = 58, /* 229+ */
> BDB_SKIP = 254, /* VBIOS only */
> };
> @@ -1486,6 +1487,16 @@ struct bdb_compression_parameters {
> struct dsc_compression_parameters_entry data[16];
> } __packed;
>
> +/*
> + * Block 57 - Vswing PreEmphasis Table
> + */
> +
> +struct bdb_vswing_preemph {
> + u8 num_tables;
> + u8 num_columns;
> + u32 tables[];
> +} __packed;
> +
> /*
> * Block 58 - Generic DTD Block
> */
--
Jani Nikula, Intel
