LGTM,
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Jani
> Nikula
> Sent: Monday, April 8, 2024 5:55 AM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; intel-xe@xxxxxxxxxxxxxxxxxxxxx
> Cc: Nikula, Jani <jani.nikula@xxxxxxxxx>; De Marchi, Lucas
> <lucas.demarchi@xxxxxxxxx>
> Subject: [PATCH 1/2] drm/i915/display: remove small micro-optimizations in irq
> handling
>
> The raw register reads/writes are there as micro-optimizations to avoid
> multiple pointer indirections on uncore->regs. Presumably this is useful
> when there are plenty of register reads/writes in the same
> function. However, the display irq handling only has a few raw
> reads/writes. Remove them for simplification.
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 15 +++++++--------
> 1 file changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index f846c5b108b5..d4ae9139be39 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -1148,15 +1148,14 @@ void gen8_de_irq_handler(struct drm_i915_private
> *dev_priv, u32 master_ctl)
>
> u32 gen11_gu_misc_irq_ack(struct drm_i915_private *i915, const u32
> master_ctl)
> {
> - void __iomem * const regs = intel_uncore_regs(&i915->uncore);
> u32 iir;
>
> if (!(master_ctl & GEN11_GU_MISC_IRQ))
> return 0;
>
> - iir = raw_reg_read(regs, GEN11_GU_MISC_IIR);
> + iir = intel_de_read(i915, GEN11_GU_MISC_IIR);
> if (likely(iir))
> - raw_reg_write(regs, GEN11_GU_MISC_IIR, iir);
> + intel_de_write(i915, GEN11_GU_MISC_IIR, iir);
>
> return iir;
> }
> @@ -1169,18 +1168,18 @@ void gen11_gu_misc_irq_handler(struct
> drm_i915_private *i915, const u32 iir)
>
> void gen11_display_irq_handler(struct drm_i915_private *i915)
> {
> - void __iomem * const regs = intel_uncore_regs(&i915->uncore);
> - const u32 disp_ctl = raw_reg_read(regs, GEN11_DISPLAY_INT_CTL);
> + u32 disp_ctl;
>
> disable_rpm_wakeref_asserts(&i915->runtime_pm);
> /*
> * GEN11_DISPLAY_INT_CTL has same format as GEN8_MASTER_IRQ
> * for the display related bits.
> */
> - raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, 0x0);
> + disp_ctl = intel_de_read(i915, GEN11_DISPLAY_INT_CTL);
> +
> + intel_de_write(i915, GEN11_DISPLAY_INT_CTL, 0);
> gen8_de_irq_handler(i915, disp_ctl);
> - raw_reg_write(regs, GEN11_DISPLAY_INT_CTL,
> - GEN11_DISPLAY_IRQ_ENABLE);
> + intel_de_write(i915, GEN11_DISPLAY_INT_CTL,
> GEN11_DISPLAY_IRQ_ENABLE);
>
> enable_rpm_wakeref_asserts(&i915->runtime_pm);
> }
> --
> 2.39.2
