Series: | drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2) |
URL: | https://patchwork.freedesktop.org/series/131386/ |
State: | success |
Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/index.html |
CI Bug Log - changes from CI_DRM_14591 -> Patchwork_131386v2
Summary
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/index.html
Participating hosts (39 -> 34)
Additional (2): fi-kbl-7567u bat-kbl-2
Missing (7): bat-dg1-7 fi-bsw-n3050 fi-apl-guc fi-snb-2520m fi-cfl-8109u bat-dg2-11 bat-jsl-1
Known issues
Here are the changes found in Patchwork_131386v2 that come from known issues:
IGT changes
Issues hit
-
igt@fbdev@info:
-
igt@gem_huc_copy@huc-copy:
-
igt@gem_lmem_swapping@basic:
-
igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2: NOTRUN -> SKIP +39 other tests skip
-
igt@kms_force_connector_basic@force-load-detect:
- fi-kbl-7567u: NOTRUN -> SKIP +11 other tests skip
Possible fixes
- igt@i915_selftest@live@execlists:
- bat-adls-6: TIMEOUT (i915#10795) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Build changes
- Linux: CI_DRM_14591 -> Patchwork_131386v2
CI-20190529: 20190529
CI_DRM_14591: 6eb009a883a7ae925b3b0f0363b64a026bb4333a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7809: 3a71f659700859cab49b8e05a198ba18a5cbd24a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_131386v2: 6eb009a883a7ae925b3b0f0363b64a026bb4333a @ git://anongit.freedesktop.org/gfx-ci/linux
Linux commits
f796b82d062e drm/i915/dp_mst: Enable HBLANK expansion quirk for UHBR rates
c0632c3ed743 drm/i915/dp_mst: Make HBLANK expansion quirk work for logical ports
1ac53dd2d610 drm/dp_mst: Add drm_dp_mst_aux_for_parent()
a2cf3329ac68 drm/dp_mst: Factor out drm_dp_mst_port_is_logical()
a1727e858c02 drm/dp: Add drm_dp_uhbr_channel_coding_supported()
e7e6403dbb1d drm/i915/dp_mst: Sanitize calculating the DSC DPT bpp limit
085cd830e1b2 drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL
5211a42a485e drm/i915/dp_mst: Account for channel coding efficiency in the DSC DPT bpp limit
a91633a13451 drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bpp
07caca67f93f drm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp limit
9b372aec4ebb drm/i915/dp: Fix DSC line buffer depth programming