Adds display support for Battlemage. Reuses the patch "drm/xe/bmg: Add BMG platform definition" from the patch series <link> to help build this series. So that review on this series can continue without blocking on <link>. Ankit Nautiyal (1): Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping" Anusha Srivatsa (1): drm/i915/xe2hpd: Add missing chicken bit register programming Balasubramani Vivekanandan (9): drm/i915/display: Prepare to handle new C20 PLL register address drm/xe/bmg: Define IS_BATTLEMAGE macro drm/i915/bmg: Define IS_BATTLEMAGE macro drm/i915/xe2: Skip CCS modifiers for Xe2 platforms drm/i915/xe2hpd: Add new C20 PLL register address drm/i915/xe2hpd: Add support for eDP PLL configuration drm/xe/xe2hpd: Define a new DRAM type INTEL_DRAM_GDDR drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5 drm/xe/bmg: Enable the display support Clint Taylor (2): drm/i915/xe2hpd: Initial cdclk table drm/xe/display: Lane reversal requires writes to both context lanes José Roberto de Souza (2): drm/i915/xe2hpd: Properly disable power in port A drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits Lucas De Marchi (1): drm/i915/xe2hpd: Add display info Matt Roper (3): drm/xe/bmg: Add BMG platform definition drm/i915/xe2hpd: Add max memory bandwidth algorithm drm/i915/bmg: BMG should re-use MTL's south display logic Matthew Auld (2): drm/xe/gt_print: add xe_gt_err_once() drm/i915/display: perform transient flush Mitul Golani (1): drm/i915/display: Enable RM timeout detection Nirmoy Das (1): drm/xe/device: implement transient flush Radhakrishna Sripada (1): drm/i915/bmg: Extend DG2 tc check to future Ravi Kumar Vodapalli (1): drm/i915/xe2hpd: update pll values in sync with Bspec drivers/gpu/drm/i915/display/intel_bios.c | 5 +- drivers/gpu/drm/i915/display/intel_bw.c | 65 +++- drivers/gpu/drm/i915/display/intel_cdclk.c | 11 + drivers/gpu/drm/i915/display/intel_cx0_phy.c | 297 ++++++++++++++++-- .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 45 ++- drivers/gpu/drm/i915/display/intel_display.c | 10 +- .../drm/i915/display/intel_display_device.c | 16 + .../gpu/drm/i915/display/intel_display_irq.c | 10 + .../drm/i915/display/intel_display_power.c | 4 + drivers/gpu/drm/i915/display/intel_dp.c | 3 + drivers/gpu/drm/i915/display/intel_fb.c | 14 +- .../gpu/drm/i915/display/intel_frontbuffer.c | 2 + drivers/gpu/drm/i915/display/intel_tdf.h | 25 ++ drivers/gpu/drm/i915/display/skl_watermark.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 11 +- drivers/gpu/drm/i915/i915_reg.h | 4 + drivers/gpu/drm/i915/soc/intel_dram.c | 4 + drivers/gpu/drm/i915/soc/intel_pch.c | 4 +- drivers/gpu/drm/xe/Makefile | 3 +- .../gpu/drm/xe/compat-i915-headers/i915_drv.h | 1 + drivers/gpu/drm/xe/display/xe_tdf.c | 13 + drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 + drivers/gpu/drm/xe/xe_device.c | 49 +++ drivers/gpu/drm/xe/xe_device.h | 2 + drivers/gpu/drm/xe/xe_device_types.h | 1 + drivers/gpu/drm/xe/xe_gt_printk.h | 3 + drivers/gpu/drm/xe/xe_pci.c | 8 + drivers/gpu/drm/xe/xe_platform_types.h | 1 + include/drm/xe_pciids.h | 7 + 29 files changed, 571 insertions(+), 52 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_tdf.h create mode 100644 drivers/gpu/drm/xe/display/xe_tdf.c -- 2.25.1
