From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
ADL DSI transcoders do not have the new SET_CONTEXT_LATENCY
register. Instead they supposedly use the older TGL VBLANK_START
based method of defining the vblank delay.
Completely untested due to lack of suitable hardware.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 00ac65a14029..e9c7e9b8957a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2617,7 +2617,7 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
* VBLANK_START no longer works on ADL+, instead we must use
* TRANS_SET_CONTEXT_LATENCY to configure the pipe vblank start.
*/
- if (DISPLAY_VER(dev_priv) >= 13) {
+ if (DISPLAY_VER(dev_priv) >= 13 && !transcoder_is_dsi(cpu_transcoder)) {
intel_de_write(dev_priv, TRANS_SET_CONTEXT_LATENCY(cpu_transcoder),
crtc_vblank_start - crtc_vdisplay);
--
2.43.0
