On Thu, Feb 15, 2024 at 12:49:30PM +0200, Jouni Högander wrote:
> Calculate aux less wake time and store it into alpm_params struct
>
> Bspec: 71477
>
> Signed-off-by: Jouni Högander <jouni.hogander@xxxxxxxxx>
> ---
> .../drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_psr.c | 53 +++++++++++++++++++
> 2 files changed, 54 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 0d4012097db1..a531c1e5af20 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1721,6 +1721,7 @@ struct intel_psr {
>
> /* LNL and beyond */
> u8 check_entry_lines;
> + u8 aux_less_wake_lines;
> } alpm_parameters;
>
> ktime_t last_entry_attempt;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 72cadad09db5..b139db67df55 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1126,6 +1126,56 @@ static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d
> return true;
> }
>
> +/*
> + * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+
> + * tSilence, Max+ tPHY Establishment + tCDS) / tline)
> + * For the "PHY P2 to P0" latency see the PHY Power Control page
> + * (PHY P2 to P0) : https://gfxspecs.intel.com/Predator/Home/Index/68965
> + * : 12 us
> + * The tLFPS_Period, Max term is 800ns
> + * The tSilence, Max term is 180ns
> + * The tPHY Establishment (a.k.a. t1) term is 50us
> + * The tCDS term is 1 or 2 times t2
> + * t2 = Number ML_PHY_LOCK * tML_PHY_LOCK
> + * Number ML_PHY_LOCK = ( 7 + CEILING( 6.5us / tML_PHY_LOCK ) + 1)
> + * Rounding up the 6.5us padding to the next ML_PHY_LOCK boundary and
> + * adding the "+ 1" term ensures all ML_PHY_LOCK sequences that start
> + * within the CDS period complete within the CDS period regardless of
> + * entry into the period
> + * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
> + * TPS4 Length = 252 Symbols
> + */
> +static int _lnl_compute_aux_less_wake_time(int port_clock)
> +{
> + int tml_phy_lock = 1000 * 252 * (10 / port_clock);
> + int num_ml_phy_lock = 7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1;
> +
> + return DIV_ROUND_UP(12 * 1000 + 800 + 180 + 50 * 1000 +
Would be much clearer to have a properly named variable for each magic
number. I don't really want to have to read the comment to understand
what the code is calculating.
> + num_ml_phy_lock * tml_phy_lock, 1000);
> +}
> +
> +static int _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp,
> + struct intel_crtc_state *crtc_state)
> +{
> + struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> + int aux_less_wake_time, aux_less_wake_lines;
> +
> + aux_less_wake_time =
> + _lnl_compute_aux_less_wake_time(crtc_state->port_clock / 1000);
> + aux_less_wake_lines = intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode,
> + aux_less_wake_time);
> +
> + if (aux_less_wake_lines > 32)
> + return false;
> +
> + if (i915->display.params.psr_safest_params)
> + aux_less_wake_lines = 32;
> +
> + intel_dp->psr.alpm_parameters.aux_less_wake_lines = aux_less_wake_lines;
> +
> + return true;
> +}
> +
> static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,
> struct intel_crtc_state *crtc_state)
> {
> @@ -1142,6 +1192,9 @@ static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,
> if (check_entry_lines > 15)
> return false;
>
> + if (!_lnl_compute_aux_less_alpm_params(intel_dp, crtc_state))
> + return false;
> +
> if (i915->display.params.psr_safest_params)
> check_entry_lines = 15;
>
> --
> 2.34.1
--
Ville Syrjälä
Intel
