On Fri, 12 Jan 2024, Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> wrote: > On Fri, Jan 12, 2024 at 07:31:51AM -0500, Hogander, Jouni wrote: >> On Wed, 2024-01-10 at 15:09 -0500, Rodrigo Vivi wrote: >> > On Tue, Jan 09, 2024 at 08:40:24PM +0000, Souza, Jose wrote: >> > > On Mon, 2024-01-08 at 17:18 -0500, Rodrigo Vivi wrote: >> > > > On Tue, Jan 02, 2024 at 09:44:48PM +0200, Jani Nikula wrote: >> > > > > On Tue, 02 Jan 2024, Juha-Pekka Heikkila >> > > > > <juhapekka.heikkila@xxxxxxxxx> wrote: >> > > > > > Aux ccs framebuffers don't work on Xe driver hence disable >> > > > > > them >> > > > > > from plane capabilities until they are fixed. Flat ccs >> > > > > > framebuffers >> > > > > > work and they are left enabled. Here is separated plane >> > > > > > capabilities >> > > > > > check on i915 so it can behave differencly depending on the >> > > > > > driver. >> > > > > >> > > > > Cc: Rodrigo and xe maintainers >> > > > > >> > > > > We need to figure out the proper workflow, the mailing lists to >> > > > > use, the >> > > > > subject prefix to use, the acks to require, etc, for changes >> > > > > touching >> > > > > both xe and i915. >> > > > > >> > > > > I'd very much prefer changes to i915 display to be merged via >> > > > > drm-intel-next as always. For one thing, it'll take a while to >> > > > > sync >> > > > > stuff back from drm-xe-next to drm-intel-next, and most display >> > > > > development still happens on drm-intel-next. >> > > > >> > > > I fully agree with you. >> > > > >> > > > > >> > > > > But this patch can't be applied to drm-intel-next, because xe >> > > > > doesn't >> > > > > even exist on drm-intel-next yet... >> > > > >> > > > should we do a backmerge of drm-next already, or too early for >> > > > that? >> > > >> > > Can we split it into 2 patches and merge it? >> > > This is necessary to fix Wayland compositors on ADL and newer. >> > >> > we can do either: >> > 1. backmerge drm-next into drm-intel-next and merge this as is. (This >> > would be with >> > Jani) >> > 2. split in 2 patches, one for drm-intel-next and the other for drm- >> > xe-next. (This would >> > be with Jouni) >> > 3. merge this as is in drm-xe-next and deal with the conflicts in a >> > future backmerge. >> > Since this is mostly adding a new file I don't believe that it would >> > be a big deal. >> > (This would impact myself) >> > >> > Since next round of drm-intel-next is mine, I'd be okay on handling >> > that and acking >> > this approach number 3. But before moving forward with this I'd like >> > to wait for >> > Jani's and Jouni's opinions. >> >> I'm fine with approach number 3. > > Jani, ack? or any plan to do a backmerge soon? I've done the backmerge, but considering this touches i915 code much more than xe, I'd prefer this get applied via i915. Or split. BR, Jani. > >> >> BR, >> >> Jouni Högander >> >> > >> > > >> > > > >> > > > > >> > > > > >> > > > > BR, >> > > > > Jani. >> > > > > >> > > > > >> > > > > > >> > > > > > Closes: >> > > > > > https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/933 >> > > > > > Signed-off-by: Juha-Pekka Heikkila >> > > > > > <juhapekka.heikkila@xxxxxxxxx> >> > > > > > --- >> > > > > > drivers/gpu/drm/i915/Makefile | 1 + >> > > > > > .../gpu/drm/i915/display/intel_plane_caps.c | 68 >> > > > > > +++++++++++++++++++ >> > > > > > .../gpu/drm/i915/display/intel_plane_caps.h | 14 ++++ >> > > > > > .../drm/i915/display/skl_universal_plane.c | 61 +-------- >> > > > > > -------- >> > > > > > drivers/gpu/drm/xe/display/xe_plane_initial.c | 23 +++++++ >> > > > > > 5 files changed, 107 insertions(+), 60 deletions(-) >> > > > > > create mode 100644 >> > > > > > drivers/gpu/drm/i915/display/intel_plane_caps.c >> > > > > > create mode 100644 >> > > > > > drivers/gpu/drm/i915/display/intel_plane_caps.h >> > > > > > >> > > > > > diff --git a/drivers/gpu/drm/i915/Makefile >> > > > > > b/drivers/gpu/drm/i915/Makefile >> > > > > > index e777686190ca..c5e3c2dd0a01 100644 >> > > > > > --- a/drivers/gpu/drm/i915/Makefile >> > > > > > +++ b/drivers/gpu/drm/i915/Makefile >> > > > > > @@ -302,6 +302,7 @@ i915-y += \ >> > > > > > display/intel_overlay.o \ >> > > > > > display/intel_pch_display.o \ >> > > > > > display/intel_pch_refclk.o \ >> > > > > > + display/intel_plane_caps.o \ >> > > > > > display/intel_plane_initial.o \ >> > > > > > display/intel_pmdemand.o \ >> > > > > > display/intel_psr.o \ >> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_plane_caps.c >> > > > > > b/drivers/gpu/drm/i915/display/intel_plane_caps.c >> > > > > > new file mode 100644 >> > > > > > index 000000000000..6206ae11f296 >> > > > > > --- /dev/null >> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_plane_caps.c >> > > > > > @@ -0,0 +1,68 @@ >> > > > > > +// SPDX-License-Identifier: MIT >> > > > > > +/* >> > > > > > + * Copyright © 2024 Intel Corporation >> > > > > > + */ >> > > > > > + >> > > > > > +#include "i915_drv.h" >> > > > > > +#include "intel_fb.h" >> > > > > > +#include "intel_plane_caps.h" >> > > > > > + >> > > > > > +static bool skl_plane_has_rc_ccs(struct drm_i915_private >> > > > > > *i915, >> > > > > > + enum pipe pipe, enum >> > > > > > plane_id plane_id) >> > > > > > +{ >> > > > > > + /* Wa_22011186057 */ >> > > > > > + if (IS_ALDERLAKE_P(i915) && IS_DISPLAY_STEP(i915, >> > > > > > STEP_A0, STEP_B0)) >> > > > > > + return false; >> > > > > > + >> > > > > > + if (DISPLAY_VER(i915) >= 11) >> > > > > > + return true; >> > > > > > + >> > > > > > + if (IS_GEMINILAKE(i915)) >> > > > > > + return pipe != PIPE_C; >> > > > > > + >> > > > > > + return pipe != PIPE_C && >> > > > > > + (plane_id == PLANE_PRIMARY || >> > > > > > + plane_id == PLANE_SPRITE0); >> > > > > > +} >> > > > > > + >> > > > > > +static bool gen12_plane_has_mc_ccs(struct drm_i915_private >> > > > > > *i915, >> > > > > > + enum plane_id plane_id) >> > > > > > +{ >> > > > > > + if (DISPLAY_VER(i915) < 12) >> > > > > > + return false; >> > > > > > + >> > > > > > + /* Wa_14010477008 */ >> > > > > > + if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || >> > > > > > + (IS_TIGERLAKE(i915) && IS_DISPLAY_STEP(i915, >> > > > > > STEP_A0, STEP_D0))) >> > > > > > + return false; >> > > > > > + >> > > > > > + /* Wa_22011186057 */ >> > > > > > + if (IS_ALDERLAKE_P(i915) && IS_DISPLAY_STEP(i915, >> > > > > > STEP_A0, STEP_B0)) >> > > > > > + return false; >> > > > > > + >> > > > > > + return plane_id < PLANE_SPRITE4; >> > > > > > +} >> > > > > > + >> > > > > > +u8 skl_get_plane_caps(struct drm_i915_private *i915, >> > > > > > + enum pipe pipe, enum plane_id plane_id) >> > > > > > +{ >> > > > > > + u8 caps = INTEL_PLANE_CAP_TILING_X; >> > > > > > + >> > > > > > + if (DISPLAY_VER(i915) < 13 || IS_ALDERLAKE_P(i915)) >> > > > > > + caps |= INTEL_PLANE_CAP_TILING_Y; >> > > > > > + if (DISPLAY_VER(i915) < 12) >> > > > > > + caps |= INTEL_PLANE_CAP_TILING_Yf; >> > > > > > + if (HAS_4TILE(i915)) >> > > > > > + caps |= INTEL_PLANE_CAP_TILING_4; >> > > > > > + >> > > > > > + if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) { >> > > > > > + caps |= INTEL_PLANE_CAP_CCS_RC; >> > > > > > + if (DISPLAY_VER(i915) >= 12) >> > > > > > + caps |= INTEL_PLANE_CAP_CCS_RC_CC; >> > > > > > + } >> > > > > > + >> > > > > > + if (gen12_plane_has_mc_ccs(i915, plane_id)) >> > > > > > + caps |= INTEL_PLANE_CAP_CCS_MC; >> > > > > > + >> > > > > > + return caps; >> > > > > > +} >> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_plane_caps.h >> > > > > > b/drivers/gpu/drm/i915/display/intel_plane_caps.h >> > > > > > new file mode 100644 >> > > > > > index 000000000000..60a941c76f23 >> > > > > > --- /dev/null >> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_plane_caps.h >> > > > > > @@ -0,0 +1,14 @@ >> > > > > > +/* SPDX-License-Identifier: MIT */ >> > > > > > +/* >> > > > > > + * Copyright © 2024 Intel Corporation >> > > > > > + */ >> > > > > > + >> > > > > > +#ifndef __INTEL_PLANE_CAPS_H__ >> > > > > > +#define __INTEL_PLANE_CAPS_H__ >> > > > > > + >> > > > > > +#include "intel_display_types.h" >> > > > > > + >> > > > > > +u8 skl_get_plane_caps(struct drm_i915_private *i915, >> > > > > > + enum pipe pipe, enum plane_id >> > > > > > plane_id); >> > > > > > + >> > > > > > +#endif /* __INTEL_PLANE_CAPS_H__ */ >> > > > > > diff --git >> > > > > > a/drivers/gpu/drm/i915/display/skl_universal_plane.c >> > > > > > b/drivers/gpu/drm/i915/display/skl_universal_plane.c >> > > > > > index 511dc1544854..f2fd3833c61d 100644 >> > > > > > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c >> > > > > > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c >> > > > > > @@ -17,6 +17,7 @@ >> > > > > > #include "intel_fb.h" >> > > > > > #include "intel_fbc.h" >> > > > > > #include "intel_frontbuffer.h" >> > > > > > +#include "intel_plane_caps.h" >> > > > > > #include "intel_psr.h" >> > > > > > #include "intel_psr_regs.h" >> > > > > > #include "skl_scaler.h" >> > > > > > @@ -2242,66 +2243,6 @@ skl_plane_disable_flip_done(struct >> > > > > > intel_plane *plane) >> > > > > > spin_unlock_irq(&i915->irq_lock); >> > > > > > } >> > > > > > >> > > > > > -static bool skl_plane_has_rc_ccs(struct drm_i915_private >> > > > > > *i915, >> > > > > > - enum pipe pipe, enum >> > > > > > plane_id plane_id) >> > > > > > -{ >> > > > > > - /* Wa_22011186057 */ >> > > > > > - if (IS_ALDERLAKE_P(i915) && IS_DISPLAY_STEP(i915, >> > > > > > STEP_A0, STEP_B0)) >> > > > > > - return false; >> > > > > > - >> > > > > > - if (DISPLAY_VER(i915) >= 11) >> > > > > > - return true; >> > > > > > - >> > > > > > - if (IS_GEMINILAKE(i915)) >> > > > > > - return pipe != PIPE_C; >> > > > > > - >> > > > > > - return pipe != PIPE_C && >> > > > > > - (plane_id == PLANE_PRIMARY || >> > > > > > - plane_id == PLANE_SPRITE0); >> > > > > > -} >> > > > > > - >> > > > > > -static bool gen12_plane_has_mc_ccs(struct drm_i915_private >> > > > > > *i915, >> > > > > > - enum plane_id plane_id) >> > > > > > -{ >> > > > > > - if (DISPLAY_VER(i915) < 12) >> > > > > > - return false; >> > > > > > - >> > > > > > - /* Wa_14010477008 */ >> > > > > > - if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || >> > > > > > - (IS_TIGERLAKE(i915) && IS_DISPLAY_STEP(i915, >> > > > > > STEP_A0, STEP_D0))) >> > > > > > - return false; >> > > > > > - >> > > > > > - /* Wa_22011186057 */ >> > > > > > - if (IS_ALDERLAKE_P(i915) && IS_DISPLAY_STEP(i915, >> > > > > > STEP_A0, STEP_B0)) >> > > > > > - return false; >> > > > > > - >> > > > > > - return plane_id < PLANE_SPRITE4; >> > > > > > -} >> > > > > > - >> > > > > > -static u8 skl_get_plane_caps(struct drm_i915_private *i915, >> > > > > > - enum pipe pipe, enum plane_id >> > > > > > plane_id) >> > > > > > -{ >> > > > > > - u8 caps = INTEL_PLANE_CAP_TILING_X; >> > > > > > - >> > > > > > - if (DISPLAY_VER(i915) < 13 || IS_ALDERLAKE_P(i915)) >> > > > > > - caps |= INTEL_PLANE_CAP_TILING_Y; >> > > > > > - if (DISPLAY_VER(i915) < 12) >> > > > > > - caps |= INTEL_PLANE_CAP_TILING_Yf; >> > > > > > - if (HAS_4TILE(i915)) >> > > > > > - caps |= INTEL_PLANE_CAP_TILING_4; >> > > > > > - >> > > > > > - if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) { >> > > > > > - caps |= INTEL_PLANE_CAP_CCS_RC; >> > > > > > - if (DISPLAY_VER(i915) >= 12) >> > > > > > - caps |= INTEL_PLANE_CAP_CCS_RC_CC; >> > > > > > - } >> > > > > > - >> > > > > > - if (gen12_plane_has_mc_ccs(i915, plane_id)) >> > > > > > - caps |= INTEL_PLANE_CAP_CCS_MC; >> > > > > > - >> > > > > > - return caps; >> > > > > > -} >> > > > > > - >> > > > > > struct intel_plane * >> > > > > > skl_universal_plane_create(struct drm_i915_private >> > > > > > *dev_priv, >> > > > > > enum pipe pipe, enum plane_id >> > > > > > plane_id) >> > > > > > diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c >> > > > > > b/drivers/gpu/drm/xe/display/xe_plane_initial.c >> > > > > > index ccf83c12b545..425c6e6744a6 100644 >> > > > > > --- a/drivers/gpu/drm/xe/display/xe_plane_initial.c >> > > > > > +++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c >> > > > > > @@ -15,6 +15,7 @@ >> > > > > > #include "intel_fb.h" >> > > > > > #include "intel_fb_pin.h" >> > > > > > #include "intel_frontbuffer.h" >> > > > > > +#include "intel_plane_caps.h" >> > > > > > #include "intel_plane_initial.h" >> > > > > > >> > > > > > static bool >> > > > > > @@ -289,3 +290,25 @@ void >> > > > > > intel_crtc_initial_plane_config(struct intel_crtc *crtc) >> > > > > > >> > > > > > plane_config_fini(&plane_config); >> > > > > > } >> > > > > > + >> > > > > > +u8 skl_get_plane_caps(struct drm_i915_private *i915, >> > > > > > + enum pipe pipe, enum plane_id plane_id) >> > > > > > +{ >> > > > > > + u8 caps = INTEL_PLANE_CAP_TILING_X; >> > > > > > + >> > > > > > + if (DISPLAY_VER(i915) < 13 || IS_ALDERLAKE_P(i915)) >> > > > > > + caps |= INTEL_PLANE_CAP_TILING_Y; >> > > > > > + if (DISPLAY_VER(i915) < 12) >> > > > > > + caps |= INTEL_PLANE_CAP_TILING_Yf; >> > > > > > + if (HAS_4TILE(i915)) >> > > > > > + caps |= INTEL_PLANE_CAP_TILING_4; >> > > > > > + >> > > > > > + if (HAS_FLAT_CCS(i915)) { >> > > > > > + caps |= INTEL_PLANE_CAP_CCS_RC | >> > > > > > INTEL_PLANE_CAP_CCS_RC_CC; >> > > > > > + >> > > > > > + if (plane_id < PLANE_SPRITE4) >> > > > > > + caps |= INTEL_PLANE_CAP_CCS_MC; >> > > > > > + } >> > > > > > + >> > > > > > + return caps; >> > > > > > +} >> > > > > >> > > > > -- >> > > > > Jani Nikula, Intel >> > > >> -- Jani Nikula, Intel
