RE: [PATCH v2 01/13] drm/i915/psr: Disable panel replay for now

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> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Jouni
> Högander
> Sent: Wednesday, January 10, 2024 6:43 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: [PATCH v2 01/13] drm/i915/psr: Disable panel replay for now
> 
> Panel replay is not completely validated yet. Let's disable it for now.

Hi,

As I understood currently the feature is not tested due to unavailability of the panel and at the same time good to check negative testing like if this feature is causing any regression for other feature like psr/psr2. Instead of hardcoding Is it ok to have a kernel cmdline parameter to enable/disable this feature? Can you please share your view.   

Regards,
Animesh
> 
> Signed-off-by: Jouni Högander <jouni.hogander@xxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/display/intel_display_types.h |  1 +
>  drivers/gpu/drm/i915/display/intel_psr.c           | 10 +++++++++-
>  2 files changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index ae2e8cff9d69..6340fabd045c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1692,6 +1692,7 @@ struct intel_psr {
>  #define I915_PSR_DEBUG_ENABLE_SEL_FETCH		0x4
>  #define I915_PSR_DEBUG_IRQ			0x10
>  #define I915_PSR_DEBUG_SU_REGION_ET_DISABLE	0x20
> +#define I915_PSR_DEBUG_PANEL_REPLAY_DISABLE	0x40
> 
>  	u32 debug;
>  	bool sink_support;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index dff21a5edeb7..9705a75e063a 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -214,6 +214,11 @@ static bool psr2_global_enabled(struct intel_dp
> *intel_dp)
>  	}
>  }
> 
> +static bool panel_replay_global_enabled(struct intel_dp *intel_dp) {
> +	return !(intel_dp->psr.debug &
> I915_PSR_DEBUG_PANEL_REPLAY_DISABLE);
> +}
> +
>  static u32 psr_irq_psr_error_bit_get(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -
> 1386,7 +1391,7 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>  	}
> 
>  	if (CAN_PANEL_REPLAY(intel_dp))
> -		crtc_state->has_panel_replay = true;
> +		crtc_state->has_panel_replay =
> panel_replay_global_enabled(intel_dp);
>  	else
>  		crtc_state->has_psr = _psr_compute_config(intel_dp,
> crtc_state);
> 
> @@ -2845,6 +2850,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
>  	/* Disable early transport for now */
>  	intel_dp->psr.debug |= I915_PSR_DEBUG_SU_REGION_ET_DISABLE;
> 
> +	/* Disable panel replay for now */
> +	intel_dp->psr.debug |= I915_PSR_DEBUG_PANEL_REPLAY_DISABLE;
> +
>  	/* Set link_standby x link_off defaults */
>  	if (DISPLAY_VER(dev_priv) < 12)
>  		/* For new platforms up to TGL let's respect VBT back again
> */
> --
> 2.34.1





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