On Fri, Oct 13, 2023 at 01:43:46PM +0300, Ville Syrjälä wrote: > On Fri, Oct 13, 2023 at 01:00:00AM +0530, vsrini4 wrote: > > Patch calculates bigjoiner pipes in mst compute. > > Patch also passes bigjoiner bool to validate plane > > max size. > > I doubt this is sufficient. The modeset sequence is still all > wrong for bigjoiner+mst. Should that be now enough with my series also? https://patchwork.freedesktop.org/series/128311/ Stan > > > > > Signed-off-by: vsrini4 <vidya.srinivas@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++++++++++++------- > > 1 file changed, 12 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > index e3f176a093d2..f499ce39b2a8 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > @@ -308,6 +308,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > > struct drm_connector_state *conn_state) > > { > > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); > > struct intel_dp *intel_dp = &intel_mst->primary->dp; > > const struct drm_display_mode *adjusted_mode = > > @@ -318,6 +319,10 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) > > return -EINVAL; > > > > + if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay, > > + adjusted_mode->crtc_clock)) > > + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); > > + > > pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; > > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > > pipe_config->has_pch_encoder = false; > > @@ -936,12 +941,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > if (ret) > > return ret; > > > > - if (mode_rate > max_rate || mode->clock > max_dotclk || > > - drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > > - *status = MODE_CLOCK_HIGH; > > - return 0; > > - } > > - > > if (mode->clock < 10000) { > > *status = MODE_CLOCK_LOW; > > return 0; > > @@ -957,6 +956,12 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > max_dotclk *= 2; > > } > > > > + if (mode_rate > max_rate || mode->clock > max_dotclk || > > + drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > > + *status = MODE_CLOCK_HIGH; > > + return 0; > > + } > > + > > if (DISPLAY_VER(dev_priv) >= 10 && > > drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { > > /* > > @@ -994,7 +999,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > if (mode_rate > max_rate && !dsc) > > return MODE_CLOCK_HIGH; > > > > - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); > > + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); > > return 0; > > } > > > > -- > > 2.33.0 > > -- > Ville Syrjälä > Intel
