We need to configure VSC Select field in video dip ctl if we want to have e.g. colorimetry date in our VSC SDP. Reported-by: Shawn Lee <shawn.c.lee@xxxxxxxxx> Signed-off-by: Jouni Högander <jouni.hogander@xxxxxxxxx> Acked-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Tested-by: Shawn Lee <shawn.c.lee@xxxxxxxxx> Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx> --- drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 39e4f5f7c817..eedef8121ff7 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -523,10 +523,12 @@ void hsw_write_infoframe(struct intel_encoder *encoder, 0); /* Wa_14013475917 */ - if (IS_DISPLAY_VER(dev_priv, 13, 14) && crtc_state->has_psr && type == DP_SDP_VSC) - return; + if (!(IS_DISPLAY_VER(dev_priv, 13, 14) && crtc_state->has_psr && type == DP_SDP_VSC)) + val |= hsw_infoframe_enable(type); + + if (type == DP_SDP_VSC) + val |= VSC_DIP_HW_DATA_SW_HEA; - val |= hsw_infoframe_enable(type); intel_de_write(dev_priv, ctl_reg, val); intel_de_posting_read(dev_priv, ctl_reg); } -- 2.34.1
