[PATCH] Revert "drm/i915/gt: Temporarily disable CPU caching into DMA for MTL"

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This reverts commit 34df0a031d8f3488fe72627b041a1f82437fa6ec.

It appears that the temporary workaround to prevent CAT errors is
no longer required, as even with it reverted the CAT errors didn't
occur when tested manually.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@xxxxxxxxx>
---
 drivers/gpu/drm/i915/gt/intel_gtt.c | 20 --------------------
 1 file changed, 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 86f73fe558ca6..3bef6d0769c66 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -101,16 +101,6 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
 	void *vaddr;
 
 	type = intel_gt_coherent_map_type(vm->gt, obj, true);
-	/*
-	 * FIXME: It is suspected that some Address Translation Service (ATS)
-	 * issue on IOMMU is causing CAT errors to occur on some MTL workloads.
-	 * Applying a write barrier to the ppgtt set entry functions appeared
-	 * to have no effect, so we must temporarily use I915_MAP_WC here on
-	 * MTL until a proper ATS solution is found.
-	 */
-	if (IS_METEORLAKE(vm->i915))
-		type = I915_MAP_WC;
-
 	vaddr = i915_gem_object_pin_map_unlocked(obj, type);
 	if (IS_ERR(vaddr))
 		return PTR_ERR(vaddr);
@@ -125,16 +115,6 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
 	void *vaddr;
 
 	type = intel_gt_coherent_map_type(vm->gt, obj, true);
-	/*
-	 * FIXME: It is suspected that some Address Translation Service (ATS)
-	 * issue on IOMMU is causing CAT errors to occur on some MTL workloads.
-	 * Applying a write barrier to the ppgtt set entry functions appeared
-	 * to have no effect, so we must temporarily use I915_MAP_WC here on
-	 * MTL until a proper ATS solution is found.
-	 */
-	if (IS_METEORLAKE(vm->i915))
-		type = I915_MAP_WC;
-
 	vaddr = i915_gem_object_pin_map(obj, type);
 	if (IS_ERR(vaddr))
 		return PTR_ERR(vaddr);
-- 
2.25.1




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