On Fri, 2023-11-24 at 10:27 +0200, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Currently no one can figure out what the PSR code is doing since > we're including any of it in the basic state dump. Add at least the > bare minimum there. > > v2: Also dump has_panel_replay (Jouni) > > Cc: Jouni Högander <jouni.hogander@xxxxxxxxx> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Jouni Högander <jouni.hogander@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > index fbe89b6f038a..49fd100ec98a 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > @@ -265,6 +265,12 @@ void intel_crtc_state_dump(const struct > intel_crtc_state *pipe_config, > > drm_dbg_kms(&i915->drm, "sdp split: %s\n", > str_enabled_disabled(pipe_config- > >sdp_split_enable)); > + > + drm_dbg_kms(&i915->drm, "psr: %s, psr2: %s, panel > replay: %s, selective fetch: %s\n", > + str_enabled_disabled(pipe_config- > >has_psr), > + str_enabled_disabled(pipe_config- > >has_psr2), > + str_enabled_disabled(pipe_config- > >has_panel_replay), > + str_enabled_disabled(pipe_config- > >enable_psr2_sel_fetch)); > } > > drm_dbg_kms(&i915->drm, "framestart delay: %d, MSA timing > delay: %d\n",
