Re: [PATCH v4 1/1] drm/i915/xe2lpd: implement WA for underruns while enabling FBC

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On Sat, Nov 11, 2023 at 01:43:20PM +0200, Vinod Govindapillai wrote:
> FIFO underruns are observed when FBC is enabled on plane 2 or
> plane 3. Recommended WA is to update the FBC enabling sequence.
> The plane binding register bits need to be updated separately
> before programming the FBC enable bit.
> 
> Bspec: 74151
> Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx> #v3
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@xxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index bde12fe62275..b73cf1c5ba33 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -608,6 +608,7 @@ static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
>  static void ivb_fbc_activate(struct intel_fbc *fbc)
>  {
>  	struct drm_i915_private *i915 = fbc->i915;
> +	u32 dpfc_ctl;
>  
>  	if (DISPLAY_VER(i915) >= 10)
>  		glk_fbc_program_cfb_stride(fbc);
> @@ -617,8 +618,13 @@ static void ivb_fbc_activate(struct intel_fbc *fbc)
>  	if (intel_gt_support_legacy_fencing(to_gt(i915)))
>  		snb_fbc_program_fence(fbc);
>  
> +	/* wa_14019417088 Alternative WA*/
> +	dpfc_ctl = ivb_dpfc_ctl(fbc);
> +	if (DISPLAY_VER(i915) >= 20)

Workarounds should never be ">=."  When they first show up in the
workaround database, they apply to some or all steppings of one very
specific IP version and only get carried forward to additional IP
versions and platforms when the workaround database also lists those
additional versions under the same lineage number.

In this case this workaround applies to all steppings of display IP
version 20.0 so we should be matching on that exactly so that we don't
apply this to future platforms where it isn't wanted.


Matt

> +		intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
> +
>  	intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id),
> -		       DPFC_CTL_EN | ivb_dpfc_ctl(fbc));
> +		       DPFC_CTL_EN | dpfc_ctl);
>  }
>  
>  static bool ivb_fbc_is_compressing(struct intel_fbc *fbc)
> -- 
> 2.34.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation



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